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TPS564247: Current carrying capacity and minimum pattern width

Part Number: TPS564247

Tool/software:

I used the following formula, which shows the temperature rise and pattern cross-sectional area of ​​MIL-STD-275E, as a reference.

RefURL : keisan.casio.jp/.../1663912785

A: Cross-sectional area [mm^2] .... Copper foil thickness: 18um. Minimum pattern width: 0.3mm

k: Coefficient by wiring layer. 0.024 for inner layer. 0.048 for outer layer. ...Outer layer this time

ΔT: Temperature rise [℃] ... I would like to keep it to about 20℃

I: Current [A] ... 3A this time

The point with the highest current density is the 0.3mm pad width of the SW pin of SOT-563.

According to the calculation, if 3A flows with the minimum pattern width of 0.3mm (SW pin), the pattern temperature will rise by nearly 300℃.

The TPS564247 has a maximum of 4A, so I think the above calculation is incorrect.


How should I calculate the temperature rise of the minimum pattern width SW pin pad (point indicated by the black arrow below) for this IC?

My specifications are shown below.
Input voltage: 12V
Output voltage: 5V
Maximum current: 3.1A
Copper foil thickness: 18um

Board diagram below. The IC near C1 is the TPS564247