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LP87745-Q1: how to disable external watchdog through hardware

Part Number: LP87745-Q1

Tool/software:

Hello,

Is there any way to disable external watchdog through hardware?

We are using LP87745-Q1 for external watchdog development.

is there any pins available other than WD_DIS to disable external watchdog when debugger is connected?

regards

Nibin Augustine

  • Hi Nibin,

    LP87745-Q1 , WD can be disabled by implementing external pull down resistor of 1.5K or less than 4.5K ohm on CS_SPI/WD_DIS pin. Whenever, the PMIC would power up the pin voltage will be sensed for few micro seconds and it has to remain low during that time period and then WD will be disabled by setting the WD_PWRHOLD register bit to 1. 

    After the sense period the pin would act as CS_SPI. 

    Regards,

    Ishtiaque 

  • Hi Ishtiaqe,

    Thank you for your prompt response regarding disabling the external watchdog on LP87745-Q1 PMIC. Your clarification on using an external pull-down resistor on CS_SPI/WD_DIS pin is helpful.

    However, I have further questions to ensure seamless integration:

    1. You mentioned that the CS_SPI/WD_DIS pin voltage is sensed only when PMIC powers up. Does this mean that the sensing occurs solely during the       

        PMIC's initial power-on sequence? Or is this sensing as soon as we power UP our ECU ?

    2. You stated that the pin voltage needs to remain low for "a few microseconds" during the sense period. Could you provide a more precise duration or a range for this sense period because considering software flashing via UART or QSPI, which typically takes longer than a few microseconds, how does disabling the external watchdog ensure uninterrupted flashing?

    Specifically:

    - Does the PMIC's watchdog disablement remain effective throughout the flashing process?
    - Or does the watchdog re-enable itself after the initial sense period, potentially interrupting the flashing process?

    To confirm, disabling the external watchdog using the CS_SPI/WD_DIS pin and setting WD_PWRHOLD register bit to 1 will not be affected by subsequent operations, including software flashing?

    Your clarification will help ensure robust and reliable system design.

    Thank you for your continued support.

    Regards,

    Shankar

  • Hello Shankar,

      PMIC's initial power-on sequence? Or is this sensing as soon as we power UP our ECU ?

    Yes during PMIC's power-up. And also whenever PMIC is re-power cycled for some reason. 

    Could you provide a more precise duration or a range for this sense period

    WD_DIS has 30 microseconds sensing deglitch filter. WD_DIS pin status needs to be lower than 0.1 V during sensing period. 

    - Does the PMIC's watchdog disablement remain effective throughout the flashing process?
    - Or does the watchdog re-enable itself after the initial sense period, potentially interrupting the flashing process?

    Yes it remains disabled. It is kept hold in the WD long window by WD_PWRHOLD bit set to 1. WD does not re-enable itself ,you would need to set that bit to 0 in order to start the WD. 

    To confirm, disabling the external watchdog using the CS_SPI/WD_DIS pin and setting WD_PWRHOLD register bit to 1 will not be affected by subsequent operations, including software flashing?

    What do you mean by software flashing ? Does this mean flashing to PMIC or system MCU? 

    If it something that you want to communicate with PMIC through SPI then SPI would be available after WD disabling event , because WD disabling sensing period happens during initial power up as explained earlier and lasts for approximately 30 microseconds. 

    I hope this answers your questions.

    Regards,

    Ishtiaque