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UCD9081: Accessing through FPGA

Part Number: UCD9081
Other Parts Discussed in Thread: UCD9080

Tool/software:

Hi,

In our application, we are trying to access UCD9081 through FPGA. We just want to read status of MON1 pin and if it is proper, need to assert EN1 pin. Please let us know, which register holds value of MON1 and which register we have to write in order to assert EN1. 

  • Hi, 

    Please refer to UCD9081 Programming Guide for detail.

    Regards

    Anne Ngo

  • Hi,

    I just want assert the EN1 signal output. In that guide, setting the EN1 polarity is mentioned but how to assert the signal is not mentioned anywhere. Please tell me which portion covers that. Also I'm trying to read version ID in 0x27 register I'm getting value 0. Do I have to do some initialization process before reading the version ID?

  • Hi, Akilarasan,

    If register 0x27 return value of zero => your device is detected as UCD9080, not UCD9081.

    Please refer to UCD9081 Advance Sequencing and Monitoring, page 6 for detail:

    To sequence on, send value = 0x00 to register 0x2F

    To shutdown, send value = 0xC0 to register 0x2F.

    Regards

    Anne Ngo

  • Hi,

    Now I'm able read 0x55 in 0x27 register. 

    That sequence enable(writing 0x00 to 0x2F) we have to do after configuring the enable pins right?. I have two modes in our system for that I have to do two different configurations.
    In first, I need to drive high signal for EN1,EN2,En3,EN4 and low signal for En5,En6,EN7,En8.
    In second, I need to drive high signal En5,En6,EN7,En8 and low signal for EN1,EN2,En3,EN4. These signals should be driven without monitoring parent rails also without any delay.

    For doing the above configurations, which registers I need to write?