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TPS65313-Q1: TPS65313-Q1 Output Voltage Regulation Issue Under Load

Part Number: TPS65313-Q1

Tool/software:

Hello,

We have designed a power evaluation board to evaluate the PMIC TPS65313-Q1 for an Automotive ECU application.

Our design closely follows the reference circuit provided in TI’s evaluation board for this PMIC.

When powering the board, all voltage outputs—3.3V, 1.2V, and 5V—are within the expected range.

However, during a load test, we observed an issue with the 3.3V output: it drops and loses regulation when the load current exceeds approximately 890 mA.

The load test was performed using a rheostat, and the voltage drop occurred when the resistance was set to 3.9 ohms or lower.

Could you please review the attached circuit and provide guidance on how to resolve this issue?

Input voltage :- 12V DC

Thank you for your support,

Jacob



circuit for review.pdf

  • Hi Jacob,

    by quick review the component selection should be ok (capacitances and inductances) but I don't see that much capacitance at the VIN pin. I believe you have that capacitance on another page of the schematic but please make sure there is enough bulk capacitance. Take a look at the EVM user's guide for reference schematic.

    Component wise I don't believe this is a stability issue but it would help a lot if you could provide me the power rails (VIN, buck1, buck2 and boost) in single scope shot to see what is going on. I would also like to know what interrupts you see when the device drops out of regulation.

    This could potentially be a layout issue so It would help if you could send me the layout files (if you have Altium project files it would be the easiest for me). Mainly I am concerned of the input and output trace widths (you can take a look at the EVM user's guide for suitable trace/plane widths for those power planes). Feedback trace is another thing that could cause an issue. Please make sure that the feedback for each regulator is taken from as close as possible to the load point. For example for buck1 you would like to probably take the feedback from capacitor C25 since I believe it is the closest one to the load.

    For the components you can check the inductor saturation current to make sure they do not saturate. For capacitors you can check the ESR and ESL. In the layout you want to make sure you have enough vias in the current path and that they are placed as close to the capacitors as possible. Preferably on the capacitor pad to reduce the loop inductance. Also check that the return path (ground) is wide enough for the current to flow back to the PMIC.

    I hope these give you a good starting point in your debug.

    regards,

    Niko

  • Your message is clear and professional. Here’s a slightly refined version with minor improvements for grammar, flow, and clarity:


    Subject: Follow-up: TPS65313-Q1 Output Voltage Regulation Issue

    Hi Niko,

    Thank you very much for your prompt and detailed response addressing the loading issues.

    I wanted to provide an update regarding the issue. Despite following your suggestions and testing the board under various conditions until last Friday, the problem persisted. However, this week, we achieved a breakthrough by replacing one of the ferrite beads (FB5, part no: MPZ2012S101ATD25) with a zero-ohm resistor. The ferrite bead was placed between AGND and PGND, as shown in the previously shared circuit. It was located below the IC's thermal pad and routed according to the layout guidelines provided in the EVM user's guide and datasheets. After making this change, the system successfully operated under the following load conditions:

    • 3.3V output at up to 2.5A, regulated well.
    • 1.2V output at 1A.
    • 5V output at 300 mA.

    The system is now functioning as expected under these loads.

    Could you please help us understand the technical reason for this behavior? Specifically:

    1. Why did the ferrite bead not perform as expected, while the zero-ohm resistor resolved the issue?
    2. Can we safely operate the IC at 100% load without risking failure?

    Thank you again for your invaluable support, and we greatly appreciate your insights on these questions.

    Best regards,
    Jacob

  • Hi Jacob,

    I am glad you were able to solve the issue. I don't have a 100% clear answer as to why this happens but probably this ferrite bead creates a voltage difference between the two grounds and this affects the behavior of the PMIC. Is it possible for you to read the interrupts after the shutdown happens? I am wondering if the PMIC would sense a loss of PGND event (see data sheet for more info) and this is why it would shut down.

    regards,

    Niko