Part Number: TPS56837
Tool/software:
Hello,
I am designing a buck around the TPS56837. The voltage out (VDL+) can change depending on the voltage applied to CVD (3V to 12V for 15V Vsupply, see sch)
My question is: is it possible to reduce the transients seen on the AC ripple (about 200mV Pk/Pk) ? and what could be the cause ? this taken at VDL+
I've attached the SMPSU schematic and waveforms
Thank you,
