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UCC14241-Q1: [URGENT] UCC14241 with UCC21710 for SiC Gate Drive Power Supply - Capacitor Component Design Confusion

Kartavya Agarwal
Prodigy 70 points
Part Number: UCC14241-Q1
Other Parts Discussed in Thread: UCC21710

Tool/software:

Hi,

I am trying to use the UCC14241 integrated power supply along with the UCC21710 isolated gate driver for driving SiC MOSFETs. The desired voltage rails are +16V (Vdd - COM) and -4V (Vee - COM).

The reason for this post: I'm getting conflicting component results when manually calculating Cout1B, Cout2, and Cout3 as compared to the gate drive requirements based on the total gate charge and required total bypass capacitance.

As a result, I'm trying to resolve the final component selection so I can progress with my system design.

General parameters I have provided as inputs for calculations using Equations 1, 2, 4, 7, and 8 from datasheet of UCC14241:

  • Desired Vdd_COM voltage = +16 V
  • Desired Vee_COM voltage = -4 V
  • Qg = 0.45 uF
  • I_max_power = 10 A (Using peak drive current capability supported by UCC21710, from datasheet)
  • I_vdd_com = 5 mA (from UCC21710 datasheet)
  • I_com_ee = 5 mA (from UCC21710 datasheet)
  • deltaV_Vdd_COM = 0.5%
  • Desired C_VDD_COM_EQ = 10 uF

Using above values and the UCC14241 datasheet equations, I calculated the following capacitance values:

  • Cout1B = 5.37 uF
  • Cout2 = 1.52 uF
  • Cout3 = 6.08 uF

To check the equivalent C_VDD_COM_EQ capacitance, I use equation (1) from the UCC14241 datasheet. The result is 4.37 uF. However, this is much less than my desired value of 10 uF as shown above.

I have the following questions outlined below, so I can progress with my design.

Questions:

  1. Can I please get some help in verifying if the parameters I have used above are correct given the dual output voltage rails requirement? I do not have access to the SIMPLIS full version so I can't simulate it myself to validate the design before PCB implementation.
  2. My calculated total bypass capacitance (Vdd_com) = 10 uF to meet the voltage droop and gate charge requirement. However, the above values do not provided the needed capacitance. Can I get help in understanding how to meet the desired bypass capacitance value?
  3. For equations 19 and 20, how do I define the value of V_FBVDD and V_FBVEE?

My entire system design has been halted due to this issue. As a result, I would really appreciate some help in resolving this problem at your earliest convenience.

Thank you,

Kartavya Agarwal.

  • 0
    Prodigy 70 points

    Also note for above parameters, deltaV_Vdd_COM = 0.09 V

  • 0 in reply to Kartavya Agarwal
    TI__Mastermind 31555 points

    Please download and us the UCC14241 Excel Design Tool. This will be much easier than trying to work through the data sheet equations manually. For dual output configuration, it is important to maintain the correct output capacitor ratio. When the design tool suggests a value such as 4.37μF, this is the minimum calculated value necessary to meet the required voltage ripple and taking into account %tolerance. If the minimum determined value is 4.37μF but you decide you want 10μF instead, then you can enter 10μF as your chosen C_VDD-COM value and the new value for C_VEE-COM will be scaled to maintain the desired capacitor ratio accordingly

    1. Can I please get some help in verifying if the parameters I have used above are correct given the dual output voltage rails requirement? I do not have access to the SIMPLIS full version so I can't simulate it myself to validate the design before PCB implementation.
      1. Use the Excel Design Tool mentioned above
    2. My calculated total bypass capacitance (Vdd_com) = 10 uF to meet the voltage droop and gate charge requirement. However, the above values do not provided the needed capacitance. Can I get help in understanding how to meet the desired bypass capacitance value?
      1. scale the values according to above recommendations
    3. For equations 19 and 20, how do I define the value of V_FBVDD and V_FBVEE?
      1. 2.5V but again, the Excel Design Tool will use this value and your values entered for the lower FB resistors to determine the value of the upper FB resistors.

    Please note that my E2E support will be suspended during the US holiday season we are about to begin. I will be returning on 1/6.

  • 0 in reply to Steven Mappus1
    Prodigy 70 points

    Hi Steven,

    Thanks a lot for your prompt response. I had a quick question regarding the Excel tool. I've been trying to use it but I'm not sure if I'm inserting the right user inputs.

    Could you please help refine my inputs if needed based on the following:

    1. For rows 17, 18 (quiescent current): I am just using the VDD quiescent current maximum value from the UCC21710 datasheet and setting both inputs to ~5 mA. Is this correct?
      1. How will this impact calculations and overall component selection?
    2. I am unable to set the I_max_power in row 40 of the excel sheet. I interpreted this parameter as the peak gate drive current that I want to source or sink with my gate drive circuit. Based on UCC21710 capabilities, I want to maximize this value to 10 A. However the excel sheet is limited to 0.15 A, and I'm unable to change it.
      1. Can you explain how I can modify this and what will be the impact on overall component selection?

  • 0 in reply to Kartavya Agarwal
    TI__Mastermind 31555 points
    1. For rows 17, 18 (quiescent current): I am just using the VDD quiescent current maximum value from the UCC21710 datasheet and setting both inputs to ~5 mA. Is this correct?
      1. Correct for UCC21710 because only one quiescent current value is given but some gate driver data sheets will five separate IVDD and IVEE quiescent current value.
      2. How will this impact calculations and overall component selection?
        1. Try it and see. The cool think with the Excel tool is that you can see how these changes impact component calculations. Try both set to 5mA, try one set to 5mA and the other set to 0mA, try both set to 0mA?
    2. I am unable to set the I_max_power in row 40 of the excel sheet. I interpreted this parameter as the peak gate drive current that I want to source or sink with my gate drive circuit. Based on UCC21710 capabilities, I want to maximize this value to 10 A. However the excel sheet is limited to 0.15 A, and I'm unable to change it.
      1. Only cells in green can be entered/changed by the user. Row 40 is not green but is the result of a calculation. 
      2. Can you explain how I can modify this and what will be the impact on overall component selection?
        1. See above answer but also, the IMAX_POWER has nothing to do with setting the max source/sink current from the gate driver. None of the calculations in this spreadsheet are related to the source/sink current capability of the gate driver. The gate drive (and SiC/IGBT) are just a load to the UCC14241. Fill in the green cells, select standard component values and move on through your design.

    Steve

  • 0 in reply to Steven Mappus1
    Prodigy 70 points

    Perfect, thanks a lot for the clarifications! I think this answers my questions for the time being. I will get back to you in case I experience any other difficulties during design or testing.

    Is there anything else I should be mindful of while designing to ensure successful implementation of the UCC14241 for this application I have outlined?

  • 0 in reply to Kartavya Agarwal
    TI__Mastermind 31555 points

    Lastly, please pay attention to the PCB layout guidelines shown in the data sheet. 

    Steve