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TPS717: Output oscillation in large output capacitor situation

Yishan Chen
Intellectual 1240 points
Part Number: TPS717

Tool/software:

Hi Team,

Customer have met a output voltage oscillation situation in large capacitive load situation. Could you help us find the root cause and how to improve the performance?

Schematic：

description：

when they add 90uF output capacitor, the output voltage start to oscillate. They can improve the performance by increase the feed-forward capacitor from 18pf to 33pF.

Is this a loop stability issue? Do we have any model to describe it?

Thank you and Merry Christmas,

Yishan Chen

  • 0
    TI__Expert 8180 points

    Hi Yishan,

    Yes, this is a loop stability issue. The max Cout for this device is 100 uF and with the 90uF load, you are overshooting that value. Please look at section 8.2.1.2 from the datasheet which says "The value of R2 directly impacts the operation of the device and must be chosen in the range of approximately 160 kΩ to 320 kΩ". Please use table 3 for sizing R1 and R2 per recommendations. Please re-test after these are adjusted and the CFF (C394 on the schematic) is removed.

    One way of eliminating the instability is to reduce the ESR of the output capacitance. This pushes the second pole further out and increases loop bandwidth. You could also add a bypass capacitor around the capacitive load which has very low ESR itself. 

    Hope this helps and best regards

    Ishaan

  • 0 in reply to Ishaan Shetye
    TI__Intellectual 1240 points

    Hi Ishaan,

    Thank you for your response.

    They solved these issue by increase the feed-forward capacitor into 33pF, Could they use this method to keep the loop stable?

    To make sure my understanding is right, the step is:

    Remove Cff-> Add bypass capacitor in the load-> adjust the feedback resistor into 160K-320K-> Retest the performance?

    If so, How do we add bypass capacitor in the load? just add some parallel capacitor? How do we determined the value of this bypass capacitor?

    Another question is, Do you have the small signal model of TPS717?

    Thank you,

    Yishan Chen

  • 0 in reply to Yishan Chen
    TI__Expert 8180 points

    Hi Yishan,

    Yes, they could use this method to stabilize the loop. Please see app notes https://www.ti.com/lit/an/sbva042/sbva042.pdf , https://www.ti.com/lit/an/slva381b/slva381b.pdf and https://www.ti.com/lit/an/snva020b/snva020b.pdf for exact understanding of the loop stability. 

    Using CFF improves the stability of the LDO by adding a zero (ZFF) and a pole (PFF)to the LDO feedback loop. However, Stability is stablished by COUT and its ESR. 

    Remove Cff-> Add bypass capacitor in the load-> adjust the feedback resistor into 160K-320K-> Retest the performance? - Correct

    If so, How do we add bypass capacitor in the load? just add some parallel capacitor? How do we determined the value of this bypass capacitor? - This is covered in the third App note above.

    Another question is, Do you have the small signal model of TPS717? - No, but we do have unencrypted PSPICE models for this part on TI.com

    Hope this helps,

    Ishaan