Tool/software:
Dear Members,
We have utilized this chip in our Power Factor Correction (PFC) design. It operates with an input voltage range of 85VAC to 265VAC, and the maximum PFC voltage should be 440VAC with current of 3A and peak of 6A. To achieve the minimum and maximum input voltages, we reduced the Ccomp value to 100pF. However, this resulted in an unstable system. Increasing the Ccomp to 1nF significantly improved stability.
My question is: Is there any recommendation for the minimum and maximum values of this capacitor? The only relevant information I found was on page 32 of the datasheet, which states:
"Analysis on the completed converter may be needed to determine the ideal compensation pole for the current averaging circuit. A capacitor that is too large on ICOMP will add phase lag and increase iTHD, whereas a capacitor that is too small will result in insufficient averaging and an unstable current averaging loop."
I have reviewed almost all the forum posts on this topic but could not find any relevant discussions.
I would greatly appreciate any assistance or insights.
Regards,
Farzaneh