TPS61378-Q1: Still see output voltage with EN low

Hi Patrick,

Please provide the R, L , C values for all the components in this schematic, so I can check whether it is OK.

Regards

Lei

Hello Lei,

Yes, sorry about that. Attached is the schematic with the values visible.

Thank you,

Patrick

Better screen shot.

Hi Patrick,

From the schematic I didn't see concerns that will result in the strange behavior - Vout = 4.8V when EN is low.

The TPS61378 has true load disconnect during shutdown(EN = 0) so the Vout will drop to zero.

I suggest that you can use PSpice for simulation. The model can be downloaded below:

https://www.ti.com/product/TPS61378-Q1?keyMatch=TPS61378-Q1&tisearch=universal_search&usecase=GPN-ALT#design-tools-simulation

Regards

Lei

Hi Lei,

Thank you for your help. Can you tell me if OUT and VO are wired correctly? The pin documentation says, "Connect this pin as the output can disable the load disconnect/short protection feature (or short this pin with VO pin)." In my case these pins are connected prior to the capacitor unlike your diagram. Do you think that this will cause any problem? We expect this configuration to NOT disconnect the input from the output.

Thanks,

Patrick

Hi Patrick,

Thank you for your feedback. Here is my late comments:

Sorry I didn't review the schematic carefully enough to noticed that the OUT pin and VO pin are shorted together!

If they are shorted, then the ISO FET is shorted, so there will be no true load disconnect function when the device is shut down (EN = 0).

Because even when EN = 0, there will be a path from Vin -> inductor -> body diode of the high-side FET -> Vout.

That's why you still see Vout when EN = 0.

The only strange place is that the Vout should be a little lower than the Vin in above conditions. Maybe the the actual Vin is higher than 4.8V.

Regards

Lei