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TPS25763Q1EVM: It does not send any GoodCRC messages when the initial connection is established as Sink/UFP.

Part Number: TPS25763Q1EVM
Other Parts Discussed in Thread: TPS25763-Q1

Tool/software:

Could you investigate the follwoing issue?

I programmed TI default configuration file and base firmware into the EVM.

Configuration file: TPS25763DQ1_V8.03_60W_DRP_I2C.json in \F411_04_01_0005_ReleaseFiles\Example files\TPS25763D-Q1\Using I2C to MUX

Base firmware: base_lowregion_F411.04.01.0005.bin 

Build GUI image: GUI configured 

VIN: 15V, current limit: 5A

(NG) It does not send any GoodCRC messages when the initial connection is established as Sink/UFP. Its port partner continuously sends Source_Cap messages but the EVM does not respond anything.

(OK) It worked fine when the initial connection is established as Source/DFP. The EVM successfully enter DP Alt Sink mode. No problem.

(NG)

 

(OK)

  • Hello,

    I have not observed such behavior before.  Can I assume the setup is unchanged between the good and the not good behavior?  The only difference is the initial role assumed by TPS25763-Q1?

    Thanks,
    Eric

  • Hi Eric,

    The setup is unchanged between the good and the not good behavior.

    The only difference is the initial connection role, Sink or Source.

    TPS25763 does not detect VBUS(5V) when the initial connection is established as Sink/UFP. Please see below.

    According to the user's guide, it appears that R8 must be placed on the EVM to detect VBUS. Right?


    Regards

    Masumi Saito

  • Hi Saito san,

    This is correct.  When configured as DRP, 763-Q1 will disable FET Q1 while in sink mode to hide the bulk capacitance on VBUS from the port.  However, this means 763-Q1 VBUS pin is no longer connected to the Type-C port.  Therefore, a resistor is needed to bypass the open FET.  This ensures VBUS can be sensed while still meeting USB compliance requirements.

    Regards,
    Eric