This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS65023-Q1: minimum input voltage to maintain 3.3Vout Buck regulation

Part Number: TPS65023-Q1

Tool/software:

Hi PMIC team, 

I usually look for a minimum OFF time of the high side FET, but I don't see this in the datasheet. 

What is the process to calculate the minimum allowed input voltage to maintain 3.3Vout regulation - for each of the Buck converters?

Thanks for any comments,

Stephanie