Tool/software:
Hi all / Mulin Yuan
My previous thrad was locked due to timing. I have now had chance to update this design. Please could you have a look and check if everyhting now looks ok! Thank you!
Schematic:
Supply input caps before the ones above:
3D view:
Top layer:
Inner 1 GND layer:
Inner 2 also GND layer:
Bottom layer:
Closer images of IC region:
Thanks in advance!
Hi Mattew,
About the schematic:
1.Recommend to add RC filter in Vin pin.
2.Change R63 and R64 to 1206/0805 package for power dissipation.
About layout:
1.Widen SW2 trace from IC to inductor. Current trace is too thin. You can change C62 and C63 to 0402 package to save space.
2.RC snubber position reference:
3.Add more vias in Vout and GND plane near IC as below.
4. Put SW2 via more close to DR1H.
Others seems good.
Regards,
Mulin
Hey Mulin Yuan
Thanks for the response and I hope you had a good holiday!
I have updated everything you mentioned I think! The only thing I wasn't sure of is - 4. Put SW2 via more close to DR1H? Also, I saw on the reference design that the space under the inductor is not filled with GND omn the top layer, is this required? Or is it ok to have it how I have below?
How does this look now? Appreciate that it is hard to judge fully just from images like this! So I have just added as many as possible:
Closer image of IC section:
Snubber locations as suggested
Many thanks for the support again!
Hi Matthew,
Sorry for mistake, I mean SW1 via and DR1H. You can put it more close as below. Others seems good.
Regards,
Mulin
