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LM74930-Q1: About the upper limit of Ciss

Masamu Ogawa
Prodigy 20 points
Part Number: LM74930-Q1
Other Parts Discussed in Thread: LM74930

Tool/software:

Hi,

Is there an upper limit to Ccap when using the LM74930?

I am using a MOSFET with model number XPQR3004PB, but it is not working properly.

When the EN pin is pulled HIGH, the FLT pin immediately goes LOW.

(It worked fine when the MOSFET model number was MTB7D0N06RJ3.)

The Ciss of XPQR3004PB is 20700pF.

Therefore, a 1uF capacitor was used for Ccap.(Ccap=10x(26910pF+26910pF)=0.5382uF@Ciss_max=26910pF)

When operating with a 24V power supply, the HGATE side MOSFET heats up. (A 6.8Ω resistor is connected to the load.)

At this time, the HGATE voltage was approximately 4 V relative to GND, and the output voltage was approximately 2 V (load current was 2 V/6.8 Ω = 0.29 A).

Ultimately I would like to be able to use the XPQR3004PB to turn around 50A of current on and off.

Please let me know if I've missed anything other than the capacitance value of Ccap.

Thank you.

  • 0
    TI__Mastermind 34145 points

    Hi Masamu,

    Please try startup without load and turn-on load once the FETs are fully on. 

    You can use this tool to scale your startup.

    FET-INRUSH-SOA-CALC Calculation tool | TI.com

    Regards,

    Shiven Dhir

  • 0 in reply to Shiven Dhir
    Prodigy 20 points

    Hi Shiven Dhir,

    Thank you for your answer.

    After redesigning using the tool, it appeared that CdVdT was too large, so by changing CdVdT, OFF to ON operation was achieved.(Vin=20V, Rload=1Ohm, Iload=20A)

    However, when I pulled the EN pin LOW to turn the circuit off, the LM74930 failed and never turned on again.
    I don't know why it fails. I've tried several times and it breaks every time, wasting parts.

    Also, how should I design Rg? (I'm currently using 100 ohms)

    By the way, in the LM749X0 datasheet, the FET on the Vin side is connected to DGATE, and the FET on the output side is connected to HGATE. (Drain common)

    On the other hand, in the LM74930 datasheet, the FET on the Vin side is connected to HGATE, and the FET on the output side is connected to DGATE. (Source common)

    The datasheet block diagrams for the LM749X0 and LM74930 are almost identical, but why is one in common drain configuration and the other in common source configuration?

    Which configuration is better for large currents?

    Thank you.

  • 0 in reply to Masamu Ogawa
    TI__Mastermind 34145 points

    Hi Masamu,

    Please read the following section in datasheet. There is a chance that pulling EN low is generating an inductive transient.

    Rg of 100ohms is fine.

    Both the configurations are identical for larger currents as far as you are turning on the loads after HGATE FETs are fully on.

    They are designed differently to support different configuration (common source / common drain) based on end application.

    Regards,

    Shiven Dhir

  • 0 in reply to Shiven Dhir
    Prodigy 20 points

    Hi Shiven Dhir,

    Thank you for your answer.

    After checking the circuit, it appears that the SBD is broken.
    After replacing the SBD it worked fine.

    Considering the output current and reverse voltage, what is the maximum current and voltage withstand capability of the SBD I should select?

    Thank you.

  • 0 in reply to Masamu Ogawa
    TI__Mastermind 34145 points

    Hi Masamu,

    Where have you placed the SBD?

    Regards,

    Shiven Dhir

  • 0 in reply to Shiven Dhir
    Prodigy 20 points

    Hi Shiven Dhir,

    Sorry.
    This is the part in the location that says "Use of a Schottky diode across the output and GND to absorb negative spikes."
    This is an SBD that is inserted between Vout and GND.

    Thank you.

  • 0 in reply to Masamu Ogawa
    TI__Mastermind 34145 points

    Hi Masamu,

    Due to output inductance, there will be negative voltage spikes generated at output of controller during transient conditions like fast turn off. We need to make sure that the -ve voltage generated at output should be clamped below |-1V| which is generally the absmax rating of the OUT pin of the Controller. The schottky diode used at the output should have,

    •  A DC blocking voltage rating much higher than the Vin(max)
    •  Non-Repetitive Peak Surge Current rating > the fast trip threshold of the controller
    • Clamping voltage at fast trip threshold less than -1V

    Regards,

    Shiven Dhir

  • 0 in reply to Shiven Dhir
    Prodigy 20 points

    Hi Shiven Dhir,

    Thank you for your advice.

    The voltage value (Vf) of the "Non-Repetitive Peak Surge Current rating" is not given in the datasheet, but would an SBD manufacturer be able to provide an answer?

    For example, for a part called FERD40H100S, the steady-state current rating is 40A and the "non-repetitive peak surge current rating" is 440A, but the graph does not show the Vf when 100A flows instantaneously. Is there a way (calculation, etc.) to find out the Vf when 100A flows instantaneously from another item on the data sheet?

    I also have a question about the image below.

    For example, if the voltage between "A" and "GND" is -20V, is it correct to understand that the voltage range between "OUT" and "GND" is -20V to 50V (70+(-20)=50)?

    Thank you.

  • 0 in reply to Masamu Ogawa
    TI__Mastermind 34145 points

    Hi Masamu,

    You can get the required information from manufacturer.

    Yes, your understanding is correct regarding the ratings.

    Regards,

    Shiven Dhir