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TPS5430: Gain and phase margin in Webench with ceramic output capacitor

ramesh murthy
Prodigy 65 points

Part Number: TPS5430

Tool/software:

Im trying to simulate the bode plot for TPS5430 with ceramic output capacitor. When I update the ESR of output capacitor as 0 ohm in Webench power designer, the phase margin fails. I saw the application note of slva237c and calculated loop compensation resistor and capacitor. How to add the loop compensation resistor and capacitor in feedback path in Webench and check the bode plot ? Image added below for reference

  • 0
    TI__Mastermind 25780 points

    Hi Ramesh,

    Can you add the ESR that the 100uF capacitor you are using has? No capacitor has 0Ohm ESR. Also there does not appear to be a way to add a cff and rff for this part in webbench.

    The best path for simulating would probably be to use pspice and add a load transient to the output and see how it behaves with the cff/rff combo you want.

    Thanks,

    Andrew