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ISO5852S-EP: Static sink current specification for DESAT pin

Part Number: ISO5852S-EP

Tool/software:

Hello,

My question is regarding the static sink current capability of the DESAT pin in the ISO5852S-EP part. The datasheet specifies that the Blanking-capacitor discharge current can range from 9mA (min) & 14mA (typ). Are these currents steady state ratings (continuous current) or dynamic, since it is specified as capacitor discharge current?

The background for my question is, we are seeing a continuous sink current of ~5.5mA into the DESAT pin (refer the below simulation image). This can be continuous when the gate driver is off & there is an internal MOSFET structure to sink the current in the DESAT pin. So we had a question about the reliability of the IC/pin. The 14mA spec given in datasheet is continuous or peak values? 

In general when only DESAT capacitor discharges, it is a short spike in current. 

Thanks. 

  • Hi Dheeraj,

    The blanking capacitor discharge current is specified at V(DESAT)-GND2=6V. This is the saturation current of the internal FET, and you should treat this as the max discharge current. That is, if you have a 100pF capacitor that is charged to 2V, you should assume that it will take at least 100p*2/(14mA)=14ns for the capacitor voltage to be re-initialized to 0V.

    Is this a simulation result? What is the schematic? I would assume that the DESAT current would return to 0A after the capacitor is discharged, but maybe your diode has a high 5.5mA leakage current.

    Best regards,

    Sean

  • Hi Sean,

    What we are doing in our implementation is that we are trying to give a pull-up source (15V with 2.7K resistor) to the DESAT pin. The reason why we are doing this is to have flexibility in choosing the DESAT/blanking capacitor. So, this pull-up is the cause for the static ~5.5mA current & not the leakage current of the Diode. The other concern is that without the external pull-up source, the blanking capacitor value will be very less & prone to disturbances. 

    I have included the screenshot of the DESAT section.

    So, this is the background of my question. I was not very confident if the current specification given is static or transient current?

    Please let me know if you need any further details?

  • Hi Dheeraj,

    The blanking capacitor discharge FET is an NMOS, with a saturation current of 14mA. If you apply a current less than 14mA, it will act like a 2 ohm Rdson resistor to COM. If you apply more than 14mA, the voltage can be arbitrarily higher.

    Since you have a 2.7k resistor, it will not saturate the 14mA pull-down NMOS. 

    This is a common technique to increase the size of the DESAT capacitor while not increasing the DESAT blanking time too much, but it adds complexity. Have you already maximized the DESAT blanking time? What is your time setting and why?

    Best regards,

    Sean

  • Hello Sean,

    Thanks for your reply!!

    We are currently designing the blanking time as ~3-4us, keeping different IGBTs & MOSFETs into consideration. What I mean is, the Gate driver section is common & based on the bus voltages & current requirement, external Switches will be selected. So in this regards, to provide flexibility, we are going with this approach.

    So, from our conversation, it is clear that the additional current load is of no issue for the DESAT pin.

    What complexity do you see from such an implementation?

    Thanks

  • Hi Dheeraj,

    It is just another component and more power dissipation. But it may be well worth the trade-off if noise immunity is a concern. 

    I just wanted to make sure that you first maximized the capacitor to the full DESAT time.

    Best regards,

    Sean

  • Thanks Sean for clarifying my query.