Tool/software:
Hi,
We are trying to stack two BQ76952 AFEs for a high side MOSFET architecture. In the previous communication (as in the screenshot and link attached below), it was communicated that DSG Pin of the Top AFE will be driven to a negative voltage in case of short circuit condition, with respect to its VSS, since DSG In follows LD Pin. Therefore, Discharge MOSFET was not recommended to be driven by top AFE.
(+) BQ76952: Stacking two ICs - Power management forum - Power management - TI E2E support forums
However, in this new reference design, Discharge MOSFETs are driven by DSG pin of the Top AFE. I understand that a lot of additional components have also been added. Could you please explain how DSG and LD Pins are driving the Discharge MOSFETs here and are protected by negative voltage contact in short circuit condition.
