Tool/software:
Hi TI support team
I've got a question during the design with the TPS62916.
I'm currently making simulation with SIMplis.
I'm wondering how to check Phase and Gain margin with a second LC filtering.
Indeed the TPS62916 have a multi feeback path (connection to VO and FB).
How can we simulate and check the 2 gain before doing a prototype ?
If I placed a Bode probe up to the resistor divider (classical approach), the loop gain is wrong (Fc=11kHz) as the fast lane is not taken into account.
And then the question is : how to measure it with a Bode100 for instance ?
A transient response will give a good estimation about the phase margin but we will be blind on the gain margin. Which is dangerous with a 2nde LC gain peaking.
Thanks for your support
Best Regards.
lionel