Other Parts Discussed in Thread: LMG3522R030, LMG3650EVM-113, LMG3650R025, ISO5852S
Tool/software:
Dear TI E2E team,
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Tool/software:
Dear TI E2E team,
Hi Marios,
We can assist you in debugging the issue with your project. For a clearer understanding of the issue I would request you to provide the following,
1. A diagram representing the electrical connection of your E-brake setup with input rectifier, EVM and load.
2. Any operating waveforms that you are able to gather within the few seconds of operation
Additionally please follow the next steps to understand the issue:
- Check the FAULT and OC pin out on the 12pin connector J1 of EVM
Based on the above we can decide if there's an overcurrent issue and the need to look for paralleling.
We can parallel LMG3522 by adding decoupling inductors to improve the dynamic current sharing performance.
Thanks,
Subhransu
HI Subhransu,
Thank you for taking the time to helping us figure the issues.
This is how we wire the LMG3522 Module and Mother Board to our Test Board and Load.
The LMG3522 was modified by removing the HIGH SIDE MOSFET

The FAULT and OC LED come on all the time once the LOW SIDE MOSFET shorts.
As I mention already, the Module Turn ON and last for about 2 seconds then dies with LOW SIDE SHORTED between the SW node and the PGND.
You think we are violating the SOA of the LMG3522 with the 4 seconds Pickup Time?
Hi Marios,
Thanks for sharing the diagram.
The FAULT and OC pins being continuously low suggests that the circuit leads to a fast di/dt event >150A/us with the current reaching >90A. This is treated as SC and hence the GaN latches into OFF state.
But to understand the cause and its a result of operating conditions from your test, I still need more details form you.
There are few details that your shared diagram does not convey to me since I am not familiar with the circuit on the additional board. Please consider providing following details:
1. Please refer to the diagram below and provide a simplified diagram of what circuit exists between HV+ and PGND.

2. Also please provide more details on the nature of the braking load. If this is represented as R,L,E then provide the numbers
3. Consider adding a V and I probe to have a clearer understanding of Vds and Id under which the GaN device is operating. This can help us understand if the SOA is being violated.
4. I am not familiar with the terms pick up time and hold time. Please explain the operating PWM as turn on/off time.
5. What differentiates the normal operation from abnormal. Please explain what do we mean here by - the circuit holds on for 2s.
Hi Subhransu,
Thank you for your quick response.
1)
This is how we test the LMG3522 LOW-SIDE Device on the Module:

2)
The loads specification we have tested with are in the image.
Resistive Load with L = 430 uH, 7.3 uF, and 50 ohms
Inductive Load with L = 96 mH, 11 uF, and 50 ohms
3)
Unfortunately we don't have access to a good Current Probe, but we are sourcing one.
Hope to get waveforms from the test.
4) But you are familiar with Solenoid Controllers, right? An Elevator Electronics Brake works the same way
you have a Pickup Drive Voltage that you need to applied to the Coil on the Brake at 100% duty cycle in our
case is 4 seconds at the Pickup Voltage and we called it pickup time. Then you switch the Drive signal to a
PWM signal of a certain frequency to drive the coil with a hold voltage and we called this hold-time. This is done
to save power needed to drive the E-Brake.
5) So, when I said the GaN holds for 2 seconds. I mean to say that the Device after turning On and driving the load
did not change the Power to the Load by changing PWM signal from 100% duty cycle
to 50% duty cycle after 2 seconds of activation.
A quick LT-Spice LR with a parallel C with givens for the Resistive Load:

di/dt ~ 7.53A/us but a peak I of about 112 Amps for a duration of 12uS.
For the Inductive Load:

di/dt ~ 8.6 A/us but the peak I is about 154 Amps for a duration of 15.7 us
Subhransu,
how did you conclude the di/dt of 150A/us?
"The FAULT and OC pins being continuously low suggests that the circuit leads to a fast di/dt event >150A/us with the current reaching >90A"
Thank you!
Hi Moises,
Thanks for sharing the images. It definitely provides more clarity about the system now.
The simulation waveforms show that the current during the experiment will reach > IT(SC) [threshold limit for Short circuit FAULT]. Under this the device will latch to OFF state. So the selected device is not suitable if the load transient currents are > 90A. Please refer to section 7.3.7.1 and 7.3.7.4 of the LMG3522R030 datasheet for the details.
Datasheet link: https://www.ti.com/lit/ds/symlink/lmg3522r030-q1.pdf?ts=1743498807742&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FLMG3522R030-Q1
My comment on 150A/us was to highlight the di/dt threshold limit for SC FAULT of LMG3522R030. Again please refer to section 7.3.7.1.
Please clarify the following point on the issue:
After PB pressed GaN conducts for 2s and then dead - DS shorted.
(FAULT pin is low implies that the GaN is latched to turn off. So this cannot show DS short). Please explain here. Are suggesting you see both DS short and FAULT pin low after 2s. And does DS short the lead to device blow up eventually?
Thanks,
Subhransu
Hi Subhransu,
I get that fact that our load is over stressing the LMG3522 device
but what I don't get is why the LMG3522 does not protect it self from
dead short event like is written on your datasheet?
The First module we Tested blew to pieces both High Side and Low Side.
We realize that we needed to get rid off the High Side device for our testing.
So we purchase two more modules and some extra LMG3522 devices just in case
we blew the up. We were able to test three more times but then found that the Low Side
device was dead and shorted from Drain to Source every single time. The Fault LED and the OC LED
both came on when the test failed, but the LMG3522 when measure with meter is shorted from its Drain to its source.
The question that still puzzles us is why the LMG3522 fails to run its OC protection?
"IT(SC) [threshold limit for Short circuit FAULT]. Under this the device will latch to OFF state. So the selected device is not suitable if the load transient currents are > 90A. Please refer to section 7.3.7.1 and 7.3.7.4 of the LMG3522R030 datasheet for the details."
That is not happening. Why?
Is there something else happening that is shorting your device from Drain to Source every time no OC protection?
Regardless, do you have another device or devices that you recommend us to use instead of the LMG3522?
We really need to get this product into production. Due to the nature of the Load we needed to be Isolated. I mean
on paper your LMG3522 is perfect for our product. Could we some how parallel two or more of these to split the Initial
current load?
Thank you!
Hi Moises,
The SC FAULT functionality should definitely work if the conditions are met, i.e. di/dt > 150A/us beyond IT(OC). So we need to clearly understand the system operation with additional probing. Lets do the following through a systematic debug process and also explore some alternate solutions:
1. As per your simulation, the di/dt should not exceed the 150A/us. Then the device should go to a cycle by cycle protection where it should not allow the current to build. Since you don't have the current probe at this stage. Can you probe the OC and FAULT pin voltages. To ensure that the devices don't blow you can consider a a slightly impedance load for this test which still creates IT(OC). You can try to run the system under 100% duty for much less than < 2s where its safe.
2. Even after the SC protection kicks in, the reverse conduction path can always carry the currents. So there may be reverse conduction path for the high currents (these can be resonant currents) in the system which is eventually leading to failure. You can try connecting a SiC diode in parallel to the GaN device since SiC diode would have a lower fwd voltage drop and conduct major part of the current on reverse direction. If this works we can explore more solutions in identifying the reason and better solutions. Please ensure that the high side GaN FET is completely removed if not used for your application.
3. We have an alternate evaluation module with e-mode GaN where the SC protection scheme is implemented differently. It is based on desat protection by Vds sensing instead of the di/dt limits. The daughter card for this is similar to the one you are using and is fully compatible with your existing motherboard. The device on board is LMG365xR025 650V 25mΩ GaN FET. However the IT(OC) threshold is lower here, i.e. 51A. But I'm asking you to consider this since the SC protection scheme implementation is different here, i.e. based on de-sat protection.
Link: https://www.ti.com/tool/LMG3650EVM-113
Please consider trying out the options above and let me know the results so that we can resolve the challenges you are facing with your setup.
Thanks,
Subhransu
Hi Subhransu,
Thank you for the LMG3650EVM-113 suggestion.
I am afraid we can't design around a part that is in pre-release state.
Do you know when they will be available? The LMG3650R025 part?
We are considering moving away from using GaN MOSFET at this point in time.
Seems like GaN although very fast and much better performance compare to Si MOSFETs
but its intricacies make them hard to use.
We would like to explore Paralleling either SiC MOSFET or IGBT.
I looked at your https://www.ti.com/tool/TIDA-00917 Reference design we like what we see
but the IGBT module is over kill for our application.
We also learned from the customer the Traction Coil parameters yesterday, that should make
things easier to size.
The Coil has the following parameters at least for the current Traction Coil the customer is using:
Inductance = 436 mH
Resistance = 43.6 ohms
Parallel Cap = 58nF
The goal is to be able to drive this Coil with two sets of signals govern by two different times:
1) Pickup Time.
To deliver Full Voltage to Coil at 100 % duty cycle for a duration of 2.5 seconds up to 3.5 seconds.
2) Hold Time
To deliver Holding Voltage to Coil at 50% or Lower duty cycle with a PWM signal of 21KHz or Higher.
Of course there is the OFF mode when not engaged.
Is your ISO5852S a good choice for this application or would you recommend
another Isolated driver?
Thank you!
Hi Moises,
You can still try points 1 and 2 above for finding the key issue here. Also if possible current probing is needed to understand the abnormal operation of the circuit here. The issue is unlikely to be caused by GaN FET and more likely to be a circuit operation. In that case changing the FET may not be of significant help.
I'll get back to you on the release date of LMG3650R025 after confirmation. But we have samples that can be evaluated by you.
Yes, ISO5852S is a good choice for isolated driver if you plan to use IGBT/MOSFET.
Thanks,
Subhransu