UC1845A: Clarification on Capacitor Values for UC1845A

Alok Shukla

Part Number: UC1845A
Other Parts Discussed in Thread: UC1845

Tool/software:

I have a few questions regarding the capacitor selection for the VCC and Vref pins of the UC1845A in our auxiliary power supply:

Why is it recommended that the VCC capacitor should be at least 10 times higher than the capacitor on Vref?
What impact would it have on circuit performance if both capacitors are 1µF, as in our current implementation?
Given that we have used 1µF for both VCC and Vref, should we increase the VCC capacitor or reduce the Vref capacitor to align with best practices?

Looking forward to your insights.

Please find the screenshot of schematic of our implementation:

2 months ago

0 Hong Huang 2 months ago

TI__Guru 69445 points

Hi,

VREF capacitors energy comes from VDD capacitors. Capacitance 10x is to make sure after energy transferred from VDD capacitors to VREF capacitors, the VDD voltage does not drop to below its UVLO off.

VDD 1uF is too small since in additional to the energy transferred to VREF capacitors, VDD capacitors energy also need to provide the driver energy before bias can be ready. Your circuit is not clear to me - how UC1845 is biased after power on? This affects the capacitance on VDD as well.

0 Alok Shukla 2 months ago in reply to Hong Huang

Prodigy 20 points

Hi, in our case UC184A is biased by input supply for flyabck only even after power up. The input for flyback is 50v dc.

+1 Hong Huang 2 months ago in reply to Alok Shukla

TI__Guru 69445 points

Hi,

If you have fixed bias then you only need to consider VDD turn on energy transfer which the current can show a spike to drop instant voltage, so 10x is required.

+1 Alok Shukla 2 months ago in reply to Hong Huang

Prodigy 20 points

Okay just to summarise for my clarity ,will the startup sequence will be like this?

As soon as the 50 v is applied at the , it will charge the Vdd caps through Resistor i.e. r346 and r347 in my schematic and when the voltage at vcc pin reaches uvlo limit it will start charging vref. So to avoid any dip in vdd during this startup we want to keep CAPs at Vdd pin 10x higher. Right?

Also what's the recommneded value of cap on vref pin.

+1 Hong Huang 2 months ago in reply to Alok Shukla

TI__Guru 69445 points

Hi,

Yes, that is correct.

VREF capacitor value is recommended minimum 0.1uF, page 5 datasheet.

+1 Alok Shukla 2 months ago in reply to Hong Huang

Prodigy 20 points

Thanks for resolving my queries, that a big help.

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UC1845A: Clarification on Capacitor Values for UC1845A