[FAQ] TPS389R0-Q1: NIRQ vs NRST Error Reporting Output Pins?

Voltage faults are reported by TPS389R0x-Q1 to the system through the use of two possible outputs, NIRQ or NRST. Error reporting outputs NIRQ and NRST can be mapped to report UVLF, UVHF, OVLF, and OVHF faults for each of the 7 possible monitors. Mapping of NIRQ and NRST is done through Bank One of the register map.

NIRQ – Is an interrupt error output with latched behavior, when any mapped fault condition occurs NIRQ remains asserted (Latched) until the action causing the fault is no longer present and a write 1-to-clear is performed clearing the bit signaling the fault.

NRST – Is a reset error out with time out behavior, when any mapped fault condition occur NRST remains asserted for a fixed timeout period after all triggering fault conditions are removed.

A major advantage of the TPS389R0x latching feature is NIRQ will not de-assert until the user has completed their diagnosis of the fault and intentionally releases the signal. For example, in the case of a monitor fault the user is able to make use of the internal ADC to sample the voltage at the error reporting monitor and determine whether NIRQ should be released or whether the system should remain in a safe state.

Regards, 

Oscar Ambriz