BQ25758: Current Sensing Problems

Hi Quinn,

I have a couple more things that I would like to know about your test setup before I start investigating this. What are you using as your reverse mode load on your input terminal? Are you using a real battery on your output terminal for the reverse mode source?

Best,
Michael

Michael, 

At the moment this is nothing attached as a load on the input terminals, instead I am using a DMM to monitor actual signal voltage and the I2C to see if the reported values are roughly matching what I am seeing. With the DMM I see no voltage being outputted to the input terminals in reverse mode. 

As for the output terminals I am using a 24V, 10A DC power supply (full specs of the supply are 60V 10A). The battery that will be attached will nominally be 24V so for pure testing conditions I am using a DC Supply in stead. 

I gathered some more data over the evening and found that Status1_Register (0x21) switches from reporting 0x40 to 0x00. From the data sheet this seems to indicate "In Input Current regulation (ILIM pin or IAC_DPM)", which would align with the high IAC_ADC readings I am getting from the regulator. 

I also measured the voltage across the SRP/SRN Sense Resistor and found that there was no voltage drop to indicate current was flowing. 

Quinn,

When you aren't using a load, your circuit will see an open circuit. Sometimes things will change depending on capacitors charging/discharging at the input terminal and the ACUV/ACOV resistor divider, but for the most part there would not be a lot of current flowing through the circuit with no load. If possible, see if the circuit behavior improves using an electronic load at your input terminal.

Best,
Michael

Michael, 

By adding the load I was able to see the Reverse Mode kick on to 5V, so this is at least a step forward in the right direction.

I will still have the issue of setting the Reverse Mode to 5V but it not kicking on if nothing is attached at the USB-C port. For example I have a Power-Z USB-C C device which analyzes the USB-C protocol from source devices. When I attach this device to the USB-C port (acting as the load) nothing happens, and the regulator remains at the open circuit output of 0V. If I need to supply 5V to the port without necessarily always having a load attached is there a way around this to force it to turn on to 5V?

Quinn,

Yes, there should be a way to hold 5V with no load. I think the input current regulation might be what's inhibiting this ability. Are you reading voltage across the ACN and ACP resistor when your IAC_ADC is giving you the high values?

Michael,

From the DMM reading across the ACN and ACP gives me 0V. 

From the Regulator reported values I get:
IAC_ADC = 0x8001

IOUT_ADC = 0x0000

VAC_ADC = 0x0005 to 0x000C (varies)

VOUT_ADC = 0x2E9C

Doing the Two's Complement of the reading gives a IAC_ADC reading of −26213.6 mA, which is what is causing the problem. As soon as a load is attached this high reading goes away. I just need a way to prevent this high reading and output the correct voltage on startup. 

Quinn,

The ADC is not actually used in determining input current regulation, but the fact that it is reading such an incorrect value makes me think that the ACP/ACN pins are seeing something incorrect. Can you send me your schematic so I can take a look?

Also, can you run a test on the device so I can see the progression of status and flag registers (registers 0x21 - 0x27)?

1. Power the device from Vout, read the status and flag registers.
2. Enable reverse mode with the load open, read the status and flag registers.
3. Plug in the load, read the status and flag registers.

Best,
Michael

Michael,

I ran the test you suggested, here are the results of the test:

1. Power the device from Vout, no load, and no enable of switcher in reverse mode

Status1 (0x21) = 0

Status2 (0x22) = 0

Status3 (0x23) = 0

Fault (0x24) = 0

Flag1 (0x25) = 0

Flag2 (0x26) = 0

Fault Flag (0x27) = 0

2. Enable Reverse Mode, no load attached

Status1 (0x21) = 0x40 for 2 seconds 0x00 for 2 seconds

Status2 (0x22) = 0 for all readings

Status3 (0x23) = 0x04 for 2 seconds 0x00 for 2 seconds

Fault (0x24) = 0x00 for all readings

Flag1 (0x25) = 0x40 for all readings

Flag2 (0x26) = 0x08 for all readings

Fault Flag (0x27) = 0x02 for all readings 

3. Reverse Mode enabled, load attached

Status1 (0x21) = 0

Status2 (0x22) = 0

Status3 (0x23) = 0x04 for all readings 

Fault (0x24) = 0

Flag1 (0x25) = 0

Flag2 (0x26) = 0

Fault Flag (0x27) = 0

From this test there are two things I notice: 

1. While Reverse Mode is enabled, but no load it attached, the Status3 Register is indicating the Reverse Enable pin is being toggled. I have confirmed through the I2C lines I only write to enable it once, and never disable it once the reverse mode is active. 

2. While Reverse mode is enabled, but no load is attached, I am getting the 1b = DRV_SUP pin fault detected. I don't really know what this means or potential ways to fix this. 

Quinn,

It looks like we need to fix the DRV_SUP fault and the input current regulation. I would still like to take a look at the schematic you are using if you can provide it.

Michael, 

I can provide the schematic. Is there anyway to make the schematic private as it contains some private IP that I do not want shared with everyone?

Quinn,

Thanks for sending that over. I believe that the DRV_SUP fault is normally caused by an out-of-range voltage value, but sometimes it trips on during device startup and when reverse mode starts up as well. Since REGN is used to power DRV_SUP, I would like to know what is happening with your REGN voltage when you have the DRV_SUP fault.

Michael, 

I took a quick look on the scope and can see that the DRV_SUP/REGN is experiencing occasional low voltage situations. The DRV_SUP/REGN voltage is ~5V with occasional dips to below 2V. I have not checked against the switching signal yet, but my hunch is that when it begins to switch/provide voltage there is a drop in the DRV_SUP line that causes the fault. 

Quinn,

That might be our problem. Check it against the switching signal when you get the chance. If that is our problem, the device supports an optional external gate drive, so I recommend making a modification to a test board to see if that solves the problem. Let me know how these tests turn out.

Best,
Michael

Michael,

I just confirmed the DRV_SUP/REGN voltage drops while switching is active. 

Before I have to alter my board at all, would any of the following register/bits make any difference to the way this operates:

Power Path Register (0x19) -> Bit 5 Enable PFM (would enabling light load potentially have an impact?)

Power Path Register (0x19) -> Bit 3 Reduce DRV Voltage (would setting this from 10V to 7V potentially have an impact?)

HIZ Mode? Not 100% sure what this does even after reading the datasheet. 

If you think it is worth while for me to try any of these I can, but wanted to get your thoughts before trying anything.

Quinn,

You can always try writing register bits. PFM may work since you would have a very light load, but you may need to disable it when you exit reverse mode. We typically recommend turning it off in a lot of instances, though.

I doubt writing PWRPATH_REDUCE_VDRV or HIZ mode will make a difference. PWRPATH_REDUCE_DRV is for bypass mode which would not regulate any voltage. HIZ mode basically prevents the converter from switching even when there is a valid input source, so it would prevent reverse mode.

Another thing you may want to try first is changing your switching MOSFETs, but I thought I noticed that your selections on your schematic were good. It seems like the "Power MOSFET Selection" section is not present in the BQ25758 datasheet, but if you look in Section 9.2.1.2.8 of the datasheet for the BQ25756, it has a description about selecting an acceptable MOSFET. While these parts are not the same, they are very similar, so the same information applies. Additionally, Figure 6-1 in the BQ25758 datasheet shows a safe operating region for driving the gates with the REGN LDO.

If you would like to give me some more time as well, I can try to find some other workarounds next week as well.

Michael, 

I tried the PFM register, and that did not make any impact on the Reverse Mode operation, as it still needed a load in order to come up to 5V.

I believe at this point we are going to have to adjust how the REGN and DRV_SUP is being managed. I see in the datasheet that typically the DRV_SUP is tied to a 5 to 10V external buck supply. Can this supply be an LDO type or does it need higher current in order to sufficiently drive the FETs?

While this would not be the correct way of doing things do you think it would be feasible to add a 5V pullup to the Reverse Mode output, with a diode to block and reverse current/higher voltages, to help force the line to 5V? 

Thank you for all the effort you put into this, I appreciate all the help and information you gave.  

Quinn,

The supply can be LDO. DRV_SUP will only go to the gate drivers, so as long as the external supply can drive the switching MOSFETS, there should be no issues.

With respect to the 5V pullup, it may work, but I can see it causing more issues. I am working under the assumption that the 5 V pullup is coming from the REGN pin. The REGN voltage is used for other purposes within the IC, so adding too many current draws will cause issues with the charger functionality.

Best,
Michael