• State TI Thinks Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 2 answers
  • Subscribers 63 subscribers
  • Views 51 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS6594-Q1: I2C address

Max Chen1
Intellectual 665 points
Part Number: TPS6594-Q1

Tool/software:

Hi,

we are using PMICs: TPS6594141BRWERQ1 and LP876441B1RQKRQ1 for SoC DRA821u2-Q1

From TPS6594-Q1 datasheet

it says, all register can be accessed via I2C1 if we only use I2C1, GPIO1 and GPIO2 are not configured as I2C.

so if only I2C1, it will need addresses for page 0, page 1, page 2, page 3 and page4, so base address = 0x48, then we need 0x49, 0x4A, 0x4B and 0x4C.

however 0x4C is used by second PMIC: LP876441B1RQKRQ1

Q1: how can we get fifth I2C1 address if we do not use second I2C2 bus, we know I2C2 bus address is 0x12?

Thanks

  • 0
    TI__Mastermind 19247 points

    Hello Max,

    Page4 belongs to the watch dog registers which is located on a completely separate device address, typically 0x12.

    Page 0 belongs to base address of 0x48, therefor the address have no conflicts with the secondary.

    For a two PMIC solution it is strongly advised that even if the secondary PMIC is not being used for the Watchdog feature that this address is set to something other than the primary PMIC.

    BR,

    Nicholas McNamara

  • 0
    Intellectual 665 points

    Hi Nick,

    the datasheet mentions that 5 pages can be on I2C1 access, which means I2C1 can access all WD registers , what is the address for page4 on I2C1?

    Thanks

    Max

  • 0 in reply to Max Chen1
    TI__Mastermind 19247 points

    That is correct.

    So for the primary PMIC with a base address of 0x48 [Page 0] there will be other pages.

    0x49 [Page 1]

    0x4A [Page 2]

    0x4B [Page 3]

    0x12 [Page 4 watchdog registers]

    For a total of 5 address on a single bus, I2C1.

    Again to make it clear that Page 4 only appears on I2C1 if the GPIO1 & GPIO2 aren't configured as the second I2C2 bus. This isn't an issue for trigger Watchdog, but may be an issue when trying to do Q&A mode due to the need to set User Configurable registers while still trying to answer the watchdog in the appropriate window.

    BR,

    Nicholas McNamara