CSD17318Q2: Chipped corner

Francisco,

I am double checking with manufacturing but I am pretty sure this chip would not have passed our final inspection criteria and so should never have been shipped to you.

Was this device like this prior to being paced on the board? Or did the device receive some mechanical impact during assembly?

The corner damage looks like it could have been some sort of impact force, this is the corner where the gate bond wire is located.

Given the likely severity of the force it is not possible to predict the reliability of the device. These types of impact may produce micro cracks in the silicon/wire bond issues which over time although working fine now may actually fail when the devices is subjected to repeated heating and cooling. It is not possible to predict this, only in application usage would see if this true or not.

The thickness of the leadframe or substrate is in the datasheet, this is 0.2mm, the chip out is likely very close to the gate bond wire which loops from an internal pad to the silicon die to form the gate connection.

I am trying to find out how high this loop is however, I would recommend the safest course of action is to replace the device in this case.

Many thanks for using our device

Best Regards

Chris Bull