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TPS7B7701-Q1: The condition for entering the latched off

Joey Chen
Prodigy 50 points
Part Number: TPS7B7701-Q1

Tool/software:

Hi TI Team,

We are using the schematic of the TPS7B7701QPWPRQ1 as shown below.

We have observed a phenomenon where, when the chip is in normal operation, briefly pulling EN low (e.g., for less than 1ms) causes the chip to enter latched-off mode, with the ERR pin pulled low and the output disabled, as illustrated in the figure below.

Upon zooming in on the waveform, we noticed that Vin briefly drops below Vout for only a very short duration (ns level), as shown in the following figure. Would the TPS7B7701 still enter latched-off mode under this condition?

       

The datasheet mentions that if a reverse current lasts longer than 5μs (typical), the chip will enter latched-off mode. What are the specific conditions for the chip to enter latched-off mode?

  • 0
    TI__Genius 11150 points

    Hi Joey,

    Please see Table 1(Fault table) for a list of conditions that can cause the output to be latched OFF. Output short to battery (during EN toggle) and reverse current (under normal operation, for more than ~ 5us) are the two conditions that can cause this. In your specific case, I think it was the former case.

    Ishaan

  • 0 in reply to Ishaan Shetye
    Prodigy 50 points

    Hi Ishaan,

    So during the EN toggle, as long as the output voltage is higher than the input voltage, the chip will consider it as meeting the "output short to battery" condition?

    Regardless of how long the output voltage remains higher than the input (even just a few nanoseconds), or how small the voltage difference is (even just a few millivolts), does the TPS7B7701 always interpret this as an "output short to battery" fault?

  • 0 in reply to Joey Chen
    TI__Genius 11150 points

    The short-to-battery threshold (V_stb_th) is shown in the 'FAULT DETECTION' section of the EC table. This detection happens when Vout - Vin is between -500 mV and 110 mV across temp. The voltage difference you see does fall within this threshold range. Please also see the 'SWITCHING CHARACTERISTICS' section in the EC table for Reverse current (Short-to-BAT) shutdown deglitch time which is 5us typical.

    Joey Chen said:
    does the TPS7B7701 always interpret this as an "output short to battery" fault?

    Unless reverse current is present. In that case, the device will interpret that as a reverse current fault

  • 0 in reply to Ishaan Shetye
    Prodigy 50 points

    Hi Ishaan,

    When Vout - Vin = -500 mV (i.e., VIN is 500 mV higher than VOUT), will this also trigger latched-off? And could reverse current exist in this scenario?

  • 0 in reply to Joey Chen
    TI__Genius 11150 points

    Please note that the -500 mV min is across temperature which means that it may not always trigger short to battery fault at this value. The typical is -55 mV. However, if a short-to-battery detection occurs for Vout - Vin = -500 mV, the output will be latched OFF until the short is removed before the next EN pulse.

    Since Vout < Vin, reverse current will not exist in this scenario.

  • 0 in reply to Ishaan Shetye
    Prodigy 50 points

    Hi Hi Ishaan,

    In your specific case, I think it was the former case.  ---> Let's go back to the initial question. I'm still quite confused—why does our current case fit the scenario of "Output short to battery"?

  • 0 in reply to Joey Chen
    TI__Genius 11150 points

    Hi Joey,

    Reverse current detection occurs under normal (continuous) operation. The short to battery is detected only on EN low to high which was your case.

  • 0 in reply to Ishaan Shetye
    Prodigy 50 points

    Hi Ishaan,

    OK, Thanks a lot~

    So, may I ask how can we avoid triggering a short to battery when the EN goes from low to high? For example, is it necessary to maintain EN at low for a certain minimum duration before pulling it high?

  • 0 in reply to Joey Chen
    TI__Genius 11150 points

    Hi Joey

    Joey Chen said:
    is it necessary to maintain EN at low for a certain minimum duration before pulling it high?

    This will not work. The fault detection occurs at every EN toggle from LOW to HIGH, irrespective of the duration of EN = LOW

    Joey Chen said:
    how can we avoid triggering a short to battery when the EN goes from low to high

    You will have to ensure that the short to battery fault is removed at the beginning of each toggle. In this case, I would add some damping on Vout and add output capacitance to ensure that Vout does not dip below Vin on the transient.