LM1117: TO-252

Hi McKyla,

Thanks for taking the time to respond to my question. Your response answered my question. I have another question if you do not mind. For the package I am looking at NDP-TO 252, junction to case and junction to board thermal resistances are given as 52.1 and 29.8 C/W indicating lower thermal resistance to the bottom. The junction to top and junction to board characterization parameters however indicates the opposite with PSI-JT and PSI-JB being 4.5 and 29.4 C/W with the junction to top having a lower resistance. I do know that the techniques in getting these variables are different but they give two opposite impression. In my case, I have measured the case temperature and I am interested in estimating the board temperature. what would you suggest to do?

This is what I was thinking was the right way: With PD= 0.8*1.3=1.04V ((Vin-Vout)*Iout) , PSI-JT = 4.5C/W, and Tc= 96C,  TJ is estimated at 96+4.5*1.04=100.7C. Then with PSY-JB= 29.4C/W, TB= 100.7-29.4*1.04= 70.1C

I appreciate your feedback. Thanks

McKyla,

Power dissipation comes from page 6 of the component datasheet. I have taken the difference of voltage 1.3V and multiplied it by Iout of 0.80. I have assumed Vinx*Ig to be negligible. The only measurement that I have is the case temperature 96C. I do not have the ambient measured around the device but could be above 68C. What i need to know is the junction and board temp estimates. how would yo do it if you were me? Thanks. 

Mojtaba

Hey Mojtaba, 

What is your Vin, Vout, Iout in your system? This is maximum dropout and maximum Iout of the device, but typically we do not use this value. Typically, we use maximum values that are expected to be on the device, not the max of the device. 

Thank you, 

McKyla

McKyla, I do not have these values measured. wouldn't using the max values gives the most conservative results? Thanks. 

Hello Mojtaba, 

Yes, but this is not realistic at all since 1.04W on an LDO is quite a lot, typically, much lower power dissipation is expected. Do you have a schematic or what Vin, Vout, Iout do you expect? 

Thanks, 

McKyla

Good Morning McKyla,

Good Point! unfortunately, all I have is the case (top) and ambient temp. All I want to do is to get an estimate of the junction and board temp in an existing test and see if it works in a different application. Please let me know if the following makes sense. 

Tj = Ta + Pd * RθJA    Eq1

Tj = Tc = Pd * ψJT       Eq2

Equate Eq1 and Eq2 and solve for Pd. Please note that Ta, Tc are known. RθJA and ψJT come from datasheet

Now, Tb is found from:

Tb = Tj – Pd * ψJB

Do you see any issues with this procedure? Thanks

Good afternooon Mojtaba, 

I hope you are having a great day!

Yes, while you can use Tj = Tc + (Pd *ψJT) to find the theoretical max Pd this will not be realistic for what the LDO can handle, because this is under ideal conditions. In addition, the board layout can change the thermal capabilities of the device by 30-50% and is the largest factor in thermal resistance other than (Vin-Vout)*Iout. This device is quite robust, so it can handle a lot of power dissipation for an LDO. The 1.04W of power dissipation should be okay for this device to handle with a board that is the same or better than the JEDEC board. 

Hopefully this helps a little to give an estimate, also keep in mind that this device's recommended Tj is 125C. 

Thank you, 

McKyla

Thank you McKyla, 

I am not worried about the device handling the load and the junction temperature will always be much lower than 125C. It is just that a NTC chip installed on the board monitors the board temp and triggers a warning message at 83C and a fault message at 88C. My intension was to get the board temp estimate when the board were in a different application. Most if not all of your customers use your products in a different environment than what these thermal metrics were developed. This should not stop your customers from using these metrics to estimate parameters in their own designs. There was a time in my past life when I designed heatsinks for major telecommunication companies. My colleagues and I always used manufacturers thermal metrics knowing that the application environment might have been different than Ideal under which thermal metrics were developed. Why? Because these data were all we had and without them we would be working in a vacuum. Cheers!

Hey Mojtaba, 

Yes, definitely understood here. We do always use estimates and understand that under any different circumstances there might be some difference. Texas Instruments always uses JEDEC standard to simulate thermal metrics. Good luck in your design! 

Thank you, 

McKyla