UCC28950: CD Resonant Leg Slower Than Active Leg Transition

Hello,

It is common that switch node at QBd does not have the same peak current as QDd to provide energy for ZVS.  The waveforms below from the UCC28950/1 application note you can find at the following link. These waveforms show this behaivor.  https://www.ti.com/lit/an/slua560d/slua560d.pdf

The reason for this in when QDd transitions it has the reflected output current across the transformer to help with the transition.   When QBd comes out of freewheeling it does not have the reflected output current to help with the transition.  To help with this transition to achieve ZVS at lighter loads you can increase the size of  the shim indutor Ls.  There is information on how to do this in the application note mentioned above.

Regards,

What you are pointing out is what I fully expect to occur on my board.  The problem is that it is the QBd node that transitions much easier compared to the QDd node.  This is backwards from everything that I've read and observed from past designs.  In SLUA560d, Figures 15-6 and 15-7 illustrate what is expected.  15-6 shows Valley switching on QBd at 10A load current and 15-7 shows ZVS achieved on the QDd node at the same load current.  The QDd node resonates with more available energy and therefore at the same load conditions achieves ZVS while the QBd node did not have enough energy to fully transition.

In my case, the situation is reversed.  Take a not in my scope images that the The "SW+" (QBd) node has a much higher dV/dT rate and is able to fully resonate for ZVS long before the "SW-" (QDd) node achieves ZVS.  In fact the QDd resonant frequency is much lower (slower dV/dT) and requires a significantly different delay time to allow it to fully resonate.  The energy seems to be available, but the transition rate is much slower.  I've yet to identify the cause of this difference in resonant frequency.  I have tried to identify cause of the asymmetry.  It's like the QDd node has some huge parasitic inductance or capacitance that does not affect the QBd node.

My transformer is wound with 4 Turns as the inner most layer, 111 turns on the 2nd layer (actually 3 layers for the full 111 turns) and the outermost layer is the opposite secondary with 4 Turns.  The transformer properties for leakage and winding capacitance seem symmetrical through measurement.  In fact other transformer designs had the primary as the inner most layer and the secondaries stacked on top of that.  This transformer exhibited an asymmetry due to the different leakage and capacitance for each polarity of the power transfer stages and resonances, however even this poorly constructed transformer still had the QDd node having this absurdly long transition time.

In past designs the typical behavior was the QBd node takes more load current to fully resonate, but the resonant frequency was roughly the same.  In this design the resonant frequency is different by at least an order of magnitude.  Oddly, the ramp rate of the QDd node seems to increase dramatically with increasing current.  This seems to imply that the current affects the tank frequency.  The effect is dramatically exaggerated when I drop the shim inductance down from about 300uH to 30uH.  This is also the first 800V input design that I've used with the UCC28950 and I wonder if this higher voltage could have some influence on this.

Hello,

If that is how your design is operating it is different than what is expected and what I have seen before as you have stated.

I reviewed the schematic of the power stage and it looks correct.  The only thing that I could think of that could cause this is if the H Bridge FETs are not be controlled with the correct UCC28950 outputs.  You might want to double check your FET driver setup to see to make sure they are setup correctly and driven with the proper outputs form the UCC28950.

Regards,

I double checked and everything is connected to the proper signals from the UCC28950 up to the gate drivers and ultimately to the FET gates themselves.  In the third scope image I even have the gate signals as measured directly on each FET, the corresponding Drain node voltages and the shim and primary currents.  Everything lines up as expected.  The firing order of the gates appears correct as well.  

One thing that I'm starting to notice in some of my scope captures is occasionally there is a pulse that is quite odd compared to the others.  This pulse is present in the first scope image.  At the end of the AD power cycle the SW- node appears to begin to commutate before the SW+ node does.  In this instance when FET B turns on (the sharp drop of SW+ to GND) the SW- node appears to actually have a resonance.  In nearly all other cases the ramp of SW- appears to look like a constant current charge ramp instead of a sinusoidal type of ramp.  To me this seems to point to something that is changing in this scenario.  I'll hunt around for other images that might exaggerate this effect.  Taking a close look at this moment though, it appears that if I'm picking out the 'frequency' of this resonance, it seems to indicate that it's close to the predicted resonant period that the AB node exhibits.  I'll come back with further details on any findings with this information.

Hello,

I wonder if this has to do with your SR timing.  Could you try disabling the SRs by tying the gates to ground to see if the issue goes away?

Also, could you provide a complete schematic for review?  I just need the controller setup, gate driver circuits and feedback.

Regards,

Here's an image of the one of the sync gates in action.  Most of the testing that I have done is with the sync circuit disabled.  The previous scope captures have the sync FET's disabled (shorted gate-source).  The behavior of the waveforms does not seem to dramatically change when the sync fet's are enabled.  

Here's a snapshot of the controller schematic.  I don't have the values for the compensation loop on the schematic, I'm not certain what these values are at the moment.  This converter is designed for 200kHz (400kHz output inductor).  I believe that for the sync circuit I have attempted to program the turn on threshold at about 4.4A output inductor current.  I believe that I have some noise interference for the sync fet enabling, because it seems to kick in at a much higher load current of about 8A.  But, that's a different issue that I don't think impacts this bridge resonance behavior.  

Before the holiday weekend I actually fully removed the 'catch diodes' on the shim/transformer node.  What I saw was interesting.  The shim/transformer current now has a continuous resonance of about 1MHz.  This frequency is about what I would expect from the values of the Coss of the FETs, shim inductance, leakage, and transformer parasitics.  The screen third waveform screenshot shows the behavior of the bridge runnin at 400V in and at a light 2A output load current.  I did not operate much higher than 400V as the node had just over 1kV peak voltage at the shim/transformer node.  I did not want to push this any further for fear of transformer breakdown.  What I find notable is that the SW- and SW+ nodes seem to resonate 'correctly'.  I don't have any better waveforms at the moment, but in this third image you can see that the primary current at the end of the power cycle was about 100mA and the SW- node resonated about 200V compared to the SW+ node that barely moved, but the primary current was nearly zero at this point.  There were better examples that I could have captured, but did not have any more time.

This leads me to some thoughts.  The input voltage is pretty high at 800V and this is new territory using this controller especially at such a low power level.  The diodes that I'm using are silicon carbide Schottky's and have a pretty low capacitance.  I'm thinking that these diodes might be part of the reason that the bridge currents are behaving as they are, but I don't understand the relationship.  I'll try to gather more specific results today.

Hello,

Thanks for the update.

I did not see the drivers for the H Bridge.  Could you include the schematic for the H Bridge driver?

Regards,

The Driver is a little bit harder to visualize as its spread over three schematic sheets...First image is the isolated gate driver.  The Left hand side comes from the UCC28950 and shown is signal "A" coming from the controller.  The right had side has connections "OUT_A" going to the Gate of FET A, and SS_A which is tied to Gate A's source.  The FET side of the gate driver is connected to a UCC14241 power supply to provide +18 and -3V to the Gate.  The second image is this driver supply IC.  And I've included the zoomed in section of FET A to show the gate and source connections to the FET from the driver.  In the original post, I do have waveform captures of all 4 gate voltages at the FET pins, relative to each FET source.  The drive seems to have a good strong signal applied.

Another thing to note is that I do not have a diode in the reverse direction to shut the FET gates off fast.   I belive that the 0 (zero) ohm resistor is actually populated with a 10 ohm resistor.   However,  I feel that the SW+ noise would be similarly affected by this if it has an effect on the transitions. 

Hello,

Thanks for the information.

I have never seen a design behave this way for CCM PSFB converters.  I wonder if the transformer primary current and inductor current is what we expect it to be.

Could you take waveforms of the QBd, QDd along with the transformer primary current and the inductor current of your design?  This may indicate why the switch nodes are not behaving as you expect.

Regards,

In the above waveform captures SW+ is QBd and SW- is QDd.  I have them labelled that way because the schematic was generated in that manner.  I have since reduced the frequency of the converter to 100kHz to see what effect it would have.  I expected a much cleaner primary current ramp due to the longer on time of the bridge.  I did not change any of the delay timing for the DELAB/CD or the sync nodes.  I've uploaded two shots at 4A load current and 800Vin.  

Hello,

I reviewed your waveforms.  QDd is SW- which is the red waveform and SW+ is QBd the green waveform.  It looks like QDd is resonating with higher magnitude than QBd at this given load.  This is what is expected and is typical.

Regards,

It might be typical that the QDd node has a higher amplitude, but what concerns me is the dramatically different behavior at different load levels.  At a very light load, the QBd node has a might higher resonant frequency.  This allows the QBd node to resonate to a much higher voltage compared to the MUCH lower resonant frequency of the QDd node.  I can show this odd behavior with a sequence of waveforms.  From this sequence of loading the difference between the legs is quite dramatic. 

Figure 1 - The shim current at the light load of 0.1A (bursting) is about 600mA and the primary current is pretty close to zero.  Figure 6 - At 16A (full load), the shim current is over 700mA and the primary current is about 600mA at the end of the power cycle.  Figures 1 - 6 are snapshots at different load levels.

At very light load, the SW+ node almost fully resonates and happens in about 200ns.  The SW- node, barely moves at all even though the measured shim current is 600mA.   Figure 2 increases the load to 1A and Figure 3 increases the load to 4A.  In Figure 3 the shim current is about 600mA, but the primary current now has risen to about 200mA at the end of the power cycle.  During the freewheeling cycle the primary current is still about 200mA.  Alternating cycles show wildly different behavior of the SW+ and SW- Nodes.  The SW+ node still is able to outperform the SW- node, and has retains its higher resonant frequency.  The SW- node swings between achieving ZVS and being 300V away from ZVS.  Again, the resonant frequency is much lower.  Given more time, I believe that this would reach the rail, but it's a difference between 200ns and potentially 1us or more on each leg.

As the output current increases to about 6A in Figure 4, there is enough energy to fully swing the SW- node to ZVS.  As the load increases the slope of the SW- node increases as well.  Surprisingly though the SW+ node does not seem to improve until the load current reaches about 8A and then gets close to ZVS at about 12A output load current shown in Figure 5.  At this load level, SW+ and SW- seem to be behaving in a very similar manner.  Both have reached ZVS in a similar amount of time.  

I'm mostly concerned with the behavior of the bridge at the lighter loads.  I intend to use this converter at both the maximum load and expecting to use this converter for a different purpose at a much lighter load.  The strange behavior of the bridge at the lighter loads has me concerned and very confused.  If I were try to rework this circuit for a much lower output load, what am I missing that would enable proper operation?  This converter topology might not be appropriate for such a low power application and I'm inclined to think that the large Vin to Vout difference especially at lighter loads is not helping.  The shim current does not change significantly between no load and 8A of load current.  Why does the SW- node react so differently when the same energy, from the shim current alone, is available to commutate the leg?  The SW- node seems to be more affected by the primary current than the contribution from the shim current.  

Figure 1 – Tek127.png – 0.1A Load

Figure 2 – Tek130.png – 1A Load

Figure 3 – Tek133.png – 4A Load

Figure 4 – Tek135.png – 6A Load

Figure 5 – Tek141.png – 12A Load

Figure 6 - Tek145.png - 16A Load