Other Parts Discussed in Thread: LM74930
Tool/software:
Hi,
We’re using the LM74930 in an ORing application with three inputs (battery or external supply) and a single output. The LM74930 is configured with back-to-back mosfet, and RC on the gates to limit inrush into our capacitive load (BLDC motors).
Requirements: 60 V DC max input (53 V nominal) and 30 A.
For that we choose MOSFETs: 3× PSMN2R3-100SSEJ (100 V rated) with low RDSON that are meant to be used in E-FUSE/load switch application:
https://www.nexperia.com/product/PSMN2R3-100SSE
The schematic closely follows the EVM. We set UVLO to 12 V, OVLO to 60 V. Inrush is ~0.81 V/ms using 100 Ω + 68 nF, and ILIM is set to 62 A.
See the Schematics in PDF attached or here:
At 36 V the circuit behaves as expected: VOUT = 0 V when EN is low, and the enable waveform matches the EVM.
Issue: above ~43–44 V, VOUT rises unexpectedly:
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At 50 V in, VOUT ≈ 6.64 V, this is enough to light the output LED, and our DC load can draw ~100 mA.
Comparing the EVM to our board: at 36 V everything looks normal. Above ~44 V, HGATE and DGATE move above 0 V (ref to ground). I would expect this to imply conduction, but measured VGS with a multimeter is a solid 0 V.
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We tried increasing VCAP from 100 nF to 400 nF - no change.
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We also removed the 57 V clamping zener on VIN - no change.
Questions:
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Could the very low RDS(on) be causing unintended behavior with the LM74930 in this topology?
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Are these MOSFETs unsuitable for this device/ORing configuration?
Thank you
