Tool/software:
Hi,
We are using the LM74502QDDFRQ1 IC to drive two back-to-back connected NMOSFETs (NVMFS5C673NLAFT1G), which have a input capacitance (CISS) of 880 pF. We have selected a VCAP capacitor of 10 nF, and the input supply voltage is 14 V.
However, we’ve observed that the IC takes approximately 1 ms for the VEN signal to gate rise. Could you please help us understand how we can reduce this rise time?
Hi Jeevabharathi,
Minimum recommended capacitor is 100nF, please dont use 10nf.
Next, this time cannot be reduced with EN signal.
You can try powering up with OV instead of EN which will lead to faster turn-on.
Regards,
Shiven Dhir
Hi Shiven Dhir,
We’ve updated the VCAP capacitor to 0.22 µF. However, we’re observing an issue where the gate voltage does not turn on completely at first. It initially pulses to around 8 V, and only after some time does it rise fully to 23 V.
We have connected the OV to GND and the VS - 13.5V.
Attached the image for your reference.
We also tried reducing the VCAP value further, but the issue persists.
Please help us to rectify this issue.
Thank you.
Hi Shiven Dhir ,
Please find the attached images for your reference.
VCAP used during the below probing is 0.1uF
1) VCAP-VS volatge during gate pulsing time is around 7V (Red channel : VCAP - VS)
2) Where as GATE-SRC volatage is around 3.8V (Red channel : VGATE-VSRC)
Please share your thoughts on this.
Thank you,
Jeevabharathi
Hi Shiven Dhir,
As we are currently in the evaluation stage, we do not yet have detailed schematics available. However, I can share a rough circuit diagram that was used during our validation process. Please find the attached image for reference.
Looking forward to your response.
Thank you,
Jeeva
