Tool/software:
Hi,
The 10.1 Layout Guidelines in the datasheet says "An array of plated vias can be placed on the pad area beneath the TAB to conduct heat to any inner plane areas or to a bottom-side copper plane."
I would like to add Via. Could you please provide us with any reference materials for our design? (For example, provide a clearance of xmm between IC pads and vias.)
Best Regards,
Nishie
