TUSB1064: Design reviw

Hi,

I will have the schematic reviewed in 1 day.

Hi Vishesh,

Thank you! 

Hi Vishesh,

Update on Violations Items.

And have some questions need clarify.

TUSB1064-7 (1).pdf

• C215 / C218 / C220 / C221 have been changed to 330nF.
  (1)
  Additionally, Pin 17 (I2C/EN) will not include level shifting design.
  1 = I2C enabled at 3.3V only.
  FLIP/SCL (Pin 21): 2-level input (Failsafe). This pin is the I2C clock.
  CTL0/SDA (Pin 22): 2-level input (Failsafe). Otherwise, this pin functions as I2C data.

  (2)
  Pins 4, 5 (SSRX) — AC coupling capacitors C95 / C94:
  Please confirm whether the recommended placement should be closer to TSU1064 or closer to the USB-C connector,
  or if AC coupling capacitors are not required.

  Pins 7, 8 (SSTX) — AC coupling capacitors C279 / C280:
  Please confirm whether the recommended placement should be closer to TSU1064 or closer to the USB-C connector,
  or if AC coupling capacitors are not required.

  (3)
  Pins 21 and 22 (I2C setting):
  Pull-up resistors R279 / R280 (10kΩ) are connected to the master voltage.

Thanks!

Jeff

Hi Jeff,

Thanks for the follow-up

Here are my comments:

Jeff YANG said:

C215 / C218 / C220 / C221 have been changed to 330nF.
(1)

OK, yes main links look OK now.

Jeff YANG said:

Additionally, Pin 17 (I2C/EN) will not include level shifting design.
1 = I2C enabled at 3.3V only.

Ok, The the PUP here should be fine. 

Jeff YANG said:

FLIP/SCL (Pin 21): 2-level input (Failsafe). This pin is the I2C clock.
CTL0/SDA (Pin 22): 2-level input (Failsafe). Otherwise, this pin functions as I2C data.

If this pin will be used for I2C mod , then this should be ok. Why is the capacitor PDOWN needed here? Is there concern for I2C edge timings?

Jeff YANG said:

Pins 4, 5 (SSRX) — AC coupling capacitors C95 / C94:
Please confirm whether the recommended placement should be closer to TSU1064 or closer to the USB-C connector,
or if AC coupling capacitors are not required.

Pins 7, 8 (SSTX) — AC coupling capacitors C279 / C280:
Please confirm whether the recommended placement should be closer to TSU1064 or closer to the USB-C connector,
or if AC coupling capacitors are not required.

These connections should be all internal to the system and should connect to the SoC. 

Are you able to share a block diagram for how these pins are connected? I'm not sure I understand how these are going to another connector?

Jeff YANG said:

Pins 21 and 22 (I2C setting):
Pull-up resistors R279 / R280 (10kΩ) are connected to the master voltage.

Im not sure what the master voltage is here, but this should be a 3.3V bus. 10K may be too weak of a pullup. we usually recommend between a 1k and 4.7k. 

Hi Vishesh,

I've send you block diagram via privacy message.

Thanks!

Jeff

Hi Vishesh,

Got it, thank you!

Hi Vishesh,

Additionally, the coupling capacitors are currently placed on the USB Hub side in the schematic layout. Thanks!

Jeff

Hi Jeff,

Sounds good. Send a layout for review once this project gets to that step.