Hi team,
we are having the following query regarding TPS552882QRPMRQ1:
- We are using multiple regulators in a cascaded configuration, where the enable pin is controlled either by the power good signal of another regulator or by an MCU I/O. From the image in the datasheet, it appears that the I_UVLO_HYS current seems to flows into the EN/UVLO pin. Could there be any leakage from EN/UVLO pin through the pull-up resistor to the voltage rail or to the MCU pin connected.

- The regulator is going to be used in an automotive application, where it must operate during vehicle cranking, where the input voltage may drop to 3–4 V while the regulator maintaining a 5 V output. whether the output voltage is sufficient to keep the internal LDO operating correctly, and what the minimum output voltage required for the VCC LDO to remain powered for normal opeation
Thanks,
Pream krishna.


