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TPS7H5001-SP: using TPS7H5001-SP to generate +ve & -ve output voltages in a PP application

Part Number: TPS7H5001-SP


Hi, 
I have a some questions realted to using TPS7H5001-SP in a Push Pull converter: 
1) Figure 9-1 in the datasheet, the SR GaN FETs are driven with respect to GND to avoid using BOOTstrap effect in GaN driver ? 
2) this will lead for the output to be taken from Transformer CT after LC/LC filter, correct ? 
normally the two terminal of the Transformer should go through a switch and their outpts are joined together to LC filter where output is taken having CT used as GND.
3) if we need to add another SEC winding that produce excatly the same voltage but with a negative sign, how should the other winding Schemtic looks like ?

Thanks! 
Mohamed

  • Hi Mohammed,

    In figure 9-1 of the TPS7H5001-SP datasheet, you are correct. The SR FETs are placed where they are to drive them with respect to GND, and avoid having to bootstrap. This placement does also lead to taking VOUT from the center-tap of the transformer secondary.

    To add a negative voltage to the output of the push-pull, something similar to the below schematic may be done:

    The schematic was taken from this document on page 4. While it does not show the TPS7H5001-SP, the topology is applicable. Using this method does mean that VOUT can no longer be on the center-tap of the secondary, and therefore driving the SR FETs will require some considerations (if synchronous rectification is used) 

  • Hi Andy, 
    Thanks for your response! SR is essential for my design:
    1) to avoid using the bootstrap effect, can we revert the the Sch in page 9-1 to produce a negative voltage with a separate winding ?
    for example use different winding polarity, assign GND to a different point any solution that can avoid the implications of having to use the Bootstrap.

     if we go with this design with SR and managed to adjust the bootstrap effect,
    2.1) where would the output filters be connected ? 
    2.2) the HS PRI MOSFET would conduct with the two diodes ( MOSFETs in the future ) in the middle and the lS PRI MOSFET would conduct with the two diodes on top and bottom ? 
    2.3) I believe that you don’t have any support material to perform that other than following datasheet of the gate drive and coming back with questions, correct ? 

    Thanks! 
    Mohamed

  • Hi Mohamed,

    Theoretically a design can be made that avoids bootstrapping, uses SR, and produces a positive and negative rail. Such a converter would use 4 SR FETs and 4 secondary windings, making the transformer complicated and potentially difficult to manufacture. Additionally, two of the SR FETs would need to have their Sources connected to the negative rail, which will introduce some complexity to driving them, although bootstrapping will be avoided.

    Although any design that produces two rail from a single controller will result in one of the rails being unregulated, or at best very poorly regulated. So if accuracy is a priority at all then I would highly advise simply using two separate converters.

    As for the above design with the four diodes, the two outer diodes will conduct during D1's on-time and the two inner diodes will conduct during D2's on-time. Such a design if implemented with FETs instead of diodes will absolutely require bootstrapping to drive the FET Gates.

    Thanks,

    Andy

  • Hi Andy, 
    Thanks for the clarification,
    1) do you have any starting material on how to learn about driving these 4 FETs with TPS7H6003 ?

    2) so in case that efficiency matter ( SR is a must ) and we would need post regulator to achieve a really small ripple (5mVpp) this mean that producing two different positive SEC voltages with no bootstrapping would be easier ( SR driving, Magnetics complexity ) than producing positive and negative voltage like you have shown above ?


    3) if we shift the discussion to flyback with SR and producing positive and negative SEC voltage, would it be simpler ? 
    is it possible without bootstrapping and with a magnetics that is easy to manufacture ?



    Thanks! 
    Mohamed

  • Hi Mohamed,

    The best resources to learn about the TPS7H6003 would be the device datasheet and the EVM User's Guide.

    I do not think that producing two different positive voltages (with no bootstrapping on the FETs) would be any easier than producing a positive and negative voltage (with no bootstrapping).

    Moving to a Flyback should prove much easier. A single primary winding and two secondary windings along with two SR FETs should allow you to produce a positive and negative voltage. Again though, only a single output can be connected to the controller feedback, so the other one will only be loosely regulated.

    Thanks,

    Andy

  • Hi Andy, 
    below you see the schematic of this flyback on the top is to generate the +ve voltage as in Ti material and below is the negative rail, I could not get my head around how should the negative rail be connected I know for sure that the diode should be reversed because the conduction will be in the other way, but what about the MOSFET should it also be reversed as below ? this means that the source will have negative voltage how will it be driven by Gate driver I could not find any info about that in the datasheet or EVM 
    what about LC filter would it stay like this ?

    Thanks! 
    Mohamed


      

  • Hi Mohamed,

    The SR FET for the negative rail will need to be on the other side of the transformer (same side as the output) with Source connected to -VOUT.

    Driving this FET would require the gate driver to use -VOUT as its GND reference, and GND as its "VIN". Such a configuration should keep a positive voltage across the gate driver, and allow it to output gate drive signals properly referenced to the FET Source.

    Regarding your output filters, in a flyback converter the transformer output should be directly connected to COUT with no inductor in between. A secondary LC filter can be added after the primary output capacitance, but it is important that there is no inductor connected directly to the transformer output. The same applies for the negative rail.

    Thanks,

    Andy

  • Hi Andy, 
    I understand that with the inductor filter, that I should put the C and then L of the output filter and then Cout of the flyback for both the +ve and -ve rail. 
    but I don't get completely this part of -ve rail SR FET, should it be like below ? 
    and does this mean that we can't use the same gate driver for the +ve & -ve rail ?
    are two gate drivers necessary or we can use SRA & SRB ( with some tweaking ) to drive both SR FETs ? 

    Thanks! 
    Mohamed



  • Hi Mohamed,

    The connection would look like this:

    For such a setup you will need two SR gate drivers, and both SR FETs will be driven on at the same time because a flyback only transfers energy to the output during the primary-side FET's off-time.

    Is it okay if I reach out to you at the email associated with your E2E account? I believe this thread along with your other active thread may be getting outside of the scope of the original E2E posts.

    Thanks,

    Andy

  • Hi Andy, 
    Yeah sure! sorry for this drift. 

    BR,
    Mohamed

  • Hi Mohamed,

    Thanks, we will reach out via email soon.

    Thanks,

    Andy