UCC24624: Gate Driver Output issue

Hi Brian,

Can you please give the scope results indicating V(SD) of both the FETs, V(gs) of both the FETs, current in both the fets? This will give overall scenario. 

Regards,

Sougata

Hello Sougata,

Here please find the waveform for Vds and Gate signals. Since it's not easy to do the soldering and measurement on that board as SMD components. 

CH1: gate signal (unexpected PWM signals)

CH2: Vds (voltage< 265mV)

Customer would also like to ask whether this IC could potentially experience abnormal operation due to unstable power supply.

From customer's testing, whenever the IC encounters an abnormality, if we do not wait for the REG pin’s capacitor to discharge before restarting the power, the IC remains in an abnormal state (the Gate PWM signal is not output). It is necessary to wait until the capacitor on the REG pin has fully discharged before re-powering the device to restore normal operation.

Additionally, their end-customer has provided the following information regarding actions that can recover the SR IC’s gate control signal after an abnormality:

1. Restart the power supply and ensure that the voltage on pin 7 (VDD) of the IC drops below 4V.
This ensures the gate control signal is restored, and this method can reliably reproduce the recovery.

2. Momentarily pull pin 3 (REG) of the SR IC to ground (GND). This method also reliably restores normal operation.

(It appears that once an abnormality occurs, the IC needs to be reset or power cycled to return to normal function.)

Regards

Brian

Hi, 

It is very odd. Can you please increase the filter cap from 220pF to 1nF and check?

Regards,

Sougata

Sougata, thank you for providing the solution for the UCC24624. However, this countermeasure (using filter capacitor values of 220p ~ 1nF) still shows no improvement inour current system.

Customer would like to ask for your help in confirming the following:

1. Please help clarify: Under certain transient conditions, the converter operating frequency suddenly increases to approximately 600kHz, and the synchronous SR IC enters an abnormal latch-up lockout state from which it cannot self-recover.

Often only one channel latches up while the other channel continues to operate normally → This should theoretically not occur. (PS: The abnormalities we frequently observe involve only a single channel)

Currently, the only recovery method is: Pull REG down to < 4V (this is effective even if the duration is less than 1ms).

• As long as the REG voltage is not interrupted, the IC remains permanently stuck
• After REG power-down and restart → 100% recoverable

The above behavior is reproducible every time.

Suspected root cause from RD: High-frequency switching (>600kHz) causes the IC's blanking/protection mechanism to fail, resulting in logic confusion.

Regards

Brian

Hi, 

Understood. If the IC is going greater than 600kHz, due to noise, the malfunction may occur as IC's max frequency is 625kHz. 

Can you please confirm the when the converter is going beyond 600kHz?

And will the customer accept if we turn off the SR when frequency goes beyond 600kHz?

Regards,

Sougata

Hello Sougata,

The upper limit frequency of the LLC converter is 250kHz; basically, the converter's operating frequency will not reach 600kHz.

When overcurrent protection (OCP) occurs, the primary-side MOSFETs will stop switching. The energy stored in the energy storage components (inductors/capacitors) will cause self-oscillation in the equivalent resonant tank on both primary and secondary sides to release the residual energy. The oscillation frequency may exceed 600kHz, which can cause the SR IC to mistakenly detect that the converter is operating above 600kHz, thereby triggering a latch-off condition on UCC24624 that cannot be recovered from.

- Yellow: Gate control – primary side  

- Green: Gate control – primary side other channel  

- Cyan: Transformer secondary voltage  

When this latch occurs, it often affects only one channel, while the other channel continues to operate normally. This results in a state where one channel is in sleep mode and the other channel remains active. To reset the IC and restore normal operation, the REG pin must be shorted to ground.

(It is understandable that the IC enters protection latch when operating outside its specified frequency range, but it should be able to recover rather than remain permanently latched. This is currently the biggest issue we are facing. If this IC is designed to not release the latch under this condition, please inform us accordingly.)

- Adjusting the filtering capacitor (filter Cap on VD1 and VD2 to GND, 220pF -> 1nF)values around the IC does not improve this issue.

We kindly request your assistance in clarifying the above description since their end customer is worried on this now.

Additionally, please help list all scenarios that can cause the IC to enter latch mode, and clearly indicate for each whether it has automatic latch-release capability.

LLC Control: STM32F(DSP)

SR Controller: UCC24624

Application: Industrial charger for vessel.

Universal:85-260Vac

24Vout/750W

Thanks!

Brian

Hi,

Understood. Had you changed the IC to a new one and have seen same problem with all the ICs?

Also, There is no latch off I found in the device datasheet. You can use load switch (or similar to) the TPS22810-Q1, it has a discharge pin called QOD.
I recommend to connect QOD to the REG pin , to turn off SR controller quickly when you hit OCP.

Regards,

Sougata

Hi Sougata, 

I`m the user of UCC24624 who request Brian to help check this issue, very appreciate your support

Currently we haven`t implemented the UCC24624 into our product yet and there is no compenstion concern in this disucssion, so please feel free to let us know whether this IC is suitable for our application. . 

We would like to clarify the following points:

1. Behavior beyond operating frequency specification

• We would like to understand how the IC behaves when the operating frequency exceeds the specified 625 kHz.
• I have reviewed the datasheet, but this condition is not described in detail, which is why I asked Brian to help confirm it.

2. Latch mode entry conditions

• Please help list all possible scenarios that can cause the IC to enter latch mode.
• For each case, please clearly indicate whether the latch condition can be automatically released or requires a manual reset.

Thank you very much for your assistance.

1. Behavior beyond operating frequency specification

• This is likely caused by the DCM ring. The IC thinks the DCM ring is a real turn on and turn on the SR. Once the SR is turned on, there is not enough current to sustain turn on, it turns off quickly. The SR then just self sustains the turn on and off, causing the high frequency switching, just on the SR side. Is it possible to add a bit capacitor on the VD pin to attenuate that DCM ring a bit from the sensing stage? Or your can change the burst threshold so that the converter can burst at a higher power level. This would help, as well. Additionally, you can use snubber on the SR to help damping the DCM ring.

2. Latch mode entry conditions

Can you try to power up the SR driver before the primary side switch starts to operate? Let us know what happens. This changes the startup sequence of the IC. We can go from there.

  Thanks.

Bing

Hi Bing

Good day, thank you for your support

We`ve added 220pF~1nF on both VD pins but is dosen`t work at all,

Your suggestions are good and will be helpful, but now we need to understand the behavior of the scenario first.

Pleas must let us konw below points, because there is no any descriptions regarding this, 

1. We would like to understand how the IC behaves in detail when the operating frequency exceeds the specified 625 kHz. 

2. Would it get latched?

3. Would it come back to work from latch if the operation frequency comes back to specified range?

Thank you.

Hi, The UCC24624 doesn't have a frequency limit. It follows the logic and the minimum on, minimum off time requirements. The device is designed to support high frequency. Therefore, if the logics are right, the controller will switch at that frequency. The logic breaks apart when the false triggering no longer happens and the part stops switching. The part resumes switching when the normal switching resumes. Additionally, the part has a sleep mode feature. When the power stage doesn't switch with high enough of an average switching frequency, the part enters the sleep mode and stops switching. The part resumes switching when it sees the power stage switching at higher frequency again.Maybe you are referring to that?

Hi Bing

We are sure that the IC doesn`t not entering sleep mode, because the switching frequency must be higher than 9kHz (sleep mode entering threshold)

Another point is that the IC could come back to work from sleep mode when the frequency go higer, but in our applicaiton the IC never comes back to work.

As previos discussion, it often affects only one channel, while the other channel continues to operate normally. The abnormal channel never comes back to work unless we short the REG pin to ground to create a reset.

According to Sougata`s feedback, If the IC is going greater than 600kHz, due to noise, the malfunction may occur as IC's max frequency is 625kHz

Coudld you please provide us more information regarding the malfunction scenario? The hi frequency ring is the cause of our issue, right?

Thanks.

Is it possible to measure the IC power VCC current? We need to know if the IC is still in sleep mode. The IC doesn't look at a single switching cycle frequency. It looks the average switching frequency through a long period of time. Additionally, can you check the REG pin voltage to make sure the IC is powered up correctly? 

Regarding the noise, as I mentioned, this is a false turn on that caused by the DCM ring. Once the turn on happens, the minimum on time causes negative current, this will make the other SR turn on. With the minimum on time on the other side, you also get the negative current. The system is in a self oscillating mode. There is nothing wrong with the IC operating in this mode. The logic is all correct. But this operation is undesired, we need to figure out a way of preventing this from happening. The snubber, the burst mode level adjustment are trying to address this from the source.

Hi Bing,

Suppose the IC is entering the sleep (Standy) mode, it shoud be able to get back to work once the operation frequency is go higher

But in our application it never comes back, the is the thing that confuse us the most. Coud you give us some information, is there any condition the IC would behave like this?

(I`m not sure whether we are able to measuring the Vcc current precisely since the current is too small, but we would try.)

Hi, we did see some cases, during startup, when the VCC is applied first and then the LLC start to switching, there is a chance the converter won't be able to come up. The suggestion is to have the converter switch before VCC is applied. We haven't observed anything after IC is already alive and stuck in the sleep mode. The IC is always able to come out of the sleep mode.

Hi Bing
Just confirm one thing with you,

For your understanding, this SR IC should always be able to recover from any latch condition once the operation conditions return to the specificed range, there is no existing any latch condition that the SR IC will never comes back to normal operation, right?

Hi,

You are right.