LM51772: Abnormal output voltage

Part Number: LM51772


Hi All,


I have a question about the LM51772.

A customer is evaluating the device with VIN=24V, VOUT=5-48V, and IOUT=2A (max).
VOUT is set via an I2C register.

(1) When VOUT is set to 5V, it initially sets to 5V, but then slowly rises.
It rises to 55V. This occurs when there is no load.
VOUT stabilizes when a certain load (1mA) is applied. What are the possible causes?

(2) In the above condition (1), when a load current of about 1A is applied, VOUT down to 4.5V.
When VOUT is checked with an oscilloscope, it is oscillating.
At the same time, Vcc2 is also oscillating, which seems to be affecting it. What are the possible causes?

I have the circuit diagram and register settings, so I can share them via private message.


Best Regards,
Ishiwata

  • Hi Ishiwata,

    thank you for using the E2E forum.

    Really a strange behavior - have never seen that before.

    Please share the schematic via private message.

    1)

    How is the MODE pin set: PSM  or FPWM 

    What MOSFETs you you use?

    2)

    Can you probe the VIN and VCC2 voltage

    What is the used Cap on VCC2 / What is the DC Bias derating of this cap?

    Best regards,

     Stefan

  • Hi Stefan,


    Thank you for your response.

    I sent the circuit diagram and register settings via private message.
    I checked the registers, but I couldn't figure out the VOUT_A setting.
    Also, since only EN_THER_WARN is set, it's possible that the correct voltage isn't being output.
    I'll check that.

    Let me confirm how VOUT_A is set.
    For a 5V output setting in 10mV steps, I believe the MSB is 0x1 and the LSB is 0xF4. Is that correct?

    (1)
    The MODE pin is connected to VCC2, so it will be forced PWM or CCM operation.
    I mentioned the MOSFET in a private message.

    (2)
    I also posted waveforms for VIN and VCC2 in a private message, so please check them.

    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    yes, the 5V setting should be OK.

    I am not sure on how to read the provided Register Table - can you help to explain that

    - Vin in the scope plot shows only around 4.72 but based on the schematic input should be 21V -  can you help to clarify

    - Cap on ILIM cap looks very low - for a first check can you disable the current limiter in the D0 Control registers via I2C

    - also please check that if the power stage is disable (enable cleared via I2C) that the output voltage does not increase like with no load.

    Best regards,

     Stefan

  • Hi Stefan,


    Thank you for your reply.

    I will check with the customer again about how to read the register table.

    There are some parts of the circuit diagram that I don't understand, so I asked a question via private message.


    Best Regards,
    Ishiwata

  • Hi Stefan,

    I have replied to your private message, please check.

    Best Regards,
    Ishiwata

  • Hello Ishiwata,

    Stefan is out of the office today. Please expect and answer on Monday.

    Best regards,
    Brigitte

  • Hi Ishiwata,

    can you please check the SW1 and SW2 nodes for undershoots which might violate the abs max ratings.

    I assume the device got damaged. I think which could happen is that the high side gate driver get damaged due to electrical overstress on the SWx node pins.

    In this case this can also impact the VCC2 voltage as this is the supply for the high side drivers as well.

    Best regards,

     Stefan

  • Hi Stefan,

    Thank you for your support.

    Under what operation does the factor you commented on as possibly causing damage occur?
    Do you think that undershoot exceeding the maximum rating occurs during normal use?
    Or does it occur when the EN is turned ON/OFF?

    When asking a customer for confirmation, it is also necessary to clarify under what conditions the request is necessary.

    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    If the SWx undershoot is violating the abs max ratings - this are given in the datasheet.

    Additionally you can also check the HB voltage .

    It should be checked in normal operation condition but also during power on and off, esp. if the issue seem to appear under this condition.

    Note: When checking use a good probe setup with smallest possible Ground loop (Tip & Barrel) and do not use and Bandwidth limitations.

    Best regards,

     Stefan

  • Hi Stefan,

    Thank you for your support.

    I have asked a customer to check for undershoot on the SWx node.

    I have received the following questions from the customer, so please answer them.

    (1) Is it possible in principle that the absolute maximum rating of the SW pin could be exceeded when EN is turned on/off for such a short time that a charge remains on Vout?
    If so, is it possible that the problem lies in the customer circuit I sent you via private message?
    If so, please let me know which part of the circuit is causing the problem.

    (2) Would you be able to perform a reproduction experiment on a TI evaluation board?

    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    1. SW undershoot have no impact on the charge on VOUT - when disabling the device there will be always charge on VOUT until the attached load has discharged them.
      Undershoots on SWx nodes are created mainly due to parasitic parameters from layout, selection of MOSFETs and can be controlled by e.g. gate resistors and/or snubbers.
      This needs to be check on the PCB and then adjusted by gate resistors and snubber components selection.
      In most cases we have made good experience to start with gate resistors in the range of 2.2 Ohm - 3.3 Ohm.
    2. I am not sure what test should be performed on the EVM - we can also provide and EVM to the customer?

    I also would like to check again one point:

    • If the VCC2 oscillations do appear, this is a permanent behavior and will not disappear with a power cycle - correct?
    • When replacing the LM51772 the board works again without the VCC2 oscillations - correct?

     

    Best regards,

     Stefan

  • Hi  Stefan,

    Thank you for your support.

    Regarding (1)
    I understand that you believe the SW undershoot is caused by the layout, and that the problem lies with the customer's layout.

    Regarding (2)
    Please use a circuit configuration that uses internal feedback (connecting the VCC2 and FB terminals) and cycle EN on and off repeatedly. I would like you to use EVM to check whether VCC2 oscillates.

    I suspect the cause is that when EN is turned off, there is still charge in VOUT, and then EN is turned on again.
    When EN is turned on, the FB terminal begins comparing VOUT with the reference voltage before the internal VCC and VCC2 start up, so it tries to output a low VOUT. I suspect this causes the PWM to stop, or VCC2 to become unstable or flow reverse current, resulting in an abnormality in VCC2.

    Can you comment on my theory?

    If voltage is applied to the FB terminal while EN is OFF and then EN is turned ON, will malfunction occur?
    Are there any restrictions on the startup sequence?

    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    2. we did this already quite often but have not seen an issue

    Please help to answer this first - we need to ensure we have the right understanding.
    It will have a big difference if the device got damaged or not. Your theory is for a system behavior but not a device damage.

    I also would like to check again one point:

    • If the VCC2 oscillations do appear, this is a permanent behavior and will not disappear with a power cycle - correct?
    • When replacing the LM51772 the board works again without the VCC2 oscillations - correct?

    Best regards,

     Stefan

  • Hi  Stefan,

    Thank you for your support.

    Regarding 2
    I have confirmed this with the EVM and will inform the customer that no similar issues have occurred. Thank you.

    • If the VCC2 oscillations do appear, this is a permanent behavior and will not disappear with a power cycle - correct?
      -->The VCC2 oscillation persists even after power cycling.

    • When replacing the LM51772 the board works again without the VCC2 oscillations - correct? -->Replacing the LM51772 causes the board to function normally.

    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    thanks for confirming, so please try to get the measurement on SW1 and SW2.

    Best regards,

     Stefan

  • Hi Stefan,

    Thank you for your support.


    I have received the waveforms, so I will send them via private message.
    Please check them.


    Best Regards,
    Ishiwata

  • Hello Ishiwata,


    our expert is out of office.
    Please expect an answer latest beginning next week.

    Best Regards,

    Johannes

  • Hello Ishiwata,

    as you already mentioned we would need much more zoomed in scope plots. ( ~ 10ns per div)  Voltage scale max 5V/div 

    Please also ensure that there is not filter on that channels enabled.

    I need again to ask this as I am still not sure we have the same understanding of the error:

    You wrote: "If VIN is restarted while VOUT voltage remains, VCC2 oscillates."

    Does this mean:

    - If VIN is restarted while VOUT voltage remains, VCC2 oscillates.

    - on the same board when VIN is restarted when VOUT is discharged, VCC2 does not oscillate and the circuit works as expected?

    Best regards,

     Stefan

  • Hi Stefan,

    Thank you for your support.


    I sent you a SW pin waveform via private message, so please check it.

    Answering your question

    - If VIN is restarted while VOUT voltage remains, VCC2 oscillates.
     --> Yes, that's correct. The device will have VCC2 oscillating. And it will never return to normal.

    - on the same board when VIN is restarted when VOUT is discharged, VCC2 does not oscillate and the circuit works as expected?
     --> Yes, that's correct. VCC2 will never oscillate.


    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    thank you for the scope plot - unfortunately it did not provide the requested scaling:

    ... more zoomed in scope plots. ( ~ 10ns per div)  Voltage scale max 5V/div 

    Please also ensure that there is not filter on that channels enabled.

    (Bandwidth filter as enabled for SWx)

    Thanks for clarifying the behavior again - i really misunderstood and assumed the device gets damaged and the only way to get the board working again was to replace the device - but as just confirmed a power cycle can get it back to normal operation.

    So we might need to restart the debugging from scratch as several points will change then.

     

    I have checked the last scope plots and have some questions on that:

    - It shows VIN drop and then recover

    - I assume while VIN is low the Enable is below the threshold of active mode - right?

    - Even on the plot with proper working IC the VOUT stays low after VIN has recovered - why? This should be a working IC

    - One of the plots shown NRST signal - was there a certain reason for that - do you want to show something there?

    - if the VIN drops does then always get NRST toggled as well?

    Note: if NRST gets low, all I2C register gets reset, do you set them again after this NRST cycle.

    - the waveform for EN=OFF would indicate that something is loading the VCC2 LDO more then expected/allowed.
      Is there anything else connected to VCC2?

    Best regards,

     Stefan

  • Hi Stefan,


    Thank you for your support.


    I will request the oscilloscope waveform again. Please wait.

    Sorry. My answer was incorrect.
    I will answer your question correctly.

    - on the same board when VIN is restarted when VOUT is discharged, VCC2 does not oscillate and the circuit works as expected?
      -->Same board = Board where VCC2 has once oscillated. 
           On a board where VCC2 has oscillated, VCC2 will continue to oscillate even if VIN is restarted with VOUT discharged.
           Once VCC2 oscillates, the device will never function properly again.


    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    thank you for clarifying that again.

    So we still need to focus on a damage of the VCC2 circuit inside the LM51772.

    Most properly this is due to undershoots on the SW which leads to overcharging the HB circuit which then impacts the VCC2 LDO.

    Best regards,

     Stefan

  • Hi Stefan,

    Thank you for your support.


    I have received the waveforms, so I will send them via private message.
    Please check them.


    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    thank you for the scope plots.

    I could not see critical undershoots.

    But the plots shows two times SW1 - what is the difference.

    Are this plots made with the highest load - worst case?

    Best regards,

     Stefan

  • Hi Ishiwata,

    .. and can we also get some plots of SW2

    Best regards,

     Stefan

  • Hi Stefan,

    Thank you for your support.



    The conditions measured by the customer were those during normal use. VCC2 oscillation also occurs under the same conditions.
    Once VCC2 oscillates, it will not return to normal operation. That's why we measure it on a good product.
    If restarting the device while VOUT voltage remains under these operating conditions, VCC2 will oscillate. It will not return to normal.

    We are currently confirming the SW2 waveform with the customer, so please wait.
    We believe that undershoot at the SW terminal is probably not related.


    When checking a past E2E, the following was found:
    LM51772EVM-HP: LM51772 EVM Reverse Current and Voltage and other Questions 

    It states that if the Vout voltage is higher than the set level, the power stage will operate in reverse.
    The customer's circuit in this case is prone to residual Vout charge.
    We believe that the Vout potential exceeds the set value, making it prone to reverse operation, which may be affecting VCC2. What are your thoughts?

    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    no, the reverse operation does not have an impact on VCC2.
    It only would be in case the reverse operation would charge up the input voltage above the abs max ratings which would then impact the LM51772 due to electrical overstress. I do not expect that this is the case but might be good to check and confirm.

    Right also on SW2 there is no observable abs max violation.

    I am still assuming that the issue is on SWx. So you may need to check if there is an undershoot when the critical issue is happening.

    So when the device might get damaged. You could trigger on SWx level of e.g. -4V and check if this gets triggered at anytime.

    Best regards,

     Stefan

  • Hi Stefan,

    I also sent the waveform for SW1 via private message. Please check.

    There is no undershoot on the SW pin that exceeds the maximum rating.

    I don't think the SW pin is the cause.

    If I restart the device with voltage applied to the FB pin, VCC2 definitely oscillates. Does this suggest any possible causes?

    Could you use TI's EVM to re-apply VCC with voltage applied to the FB pin and see if the issue reoccurs?

    Can you monitor the FB pin and VCC with an oscilloscope?

    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    I am not sure what you exactly mean with that test: is VCC in VIN? What should i apply at the FB pin?

    " Could you use TI's EVM to re-apply VCC with voltage applied to the FB pin and see if the issue reoccurs?"

    Can you please give more detailed instructions.

     - What apply where?

     - Input voltage, load current

     - what to measure.

    e.g. Vin supply = 12V, no load, toggle EN to enable and disable the power stage ( 10ms on / 10ms off), run for a minute

    -> Monitor FB and VCC with scope ( which time resolution)

    Best regards,

     Stefan

  • Hi Stefan,

    Thank you for your support.


    I would like you to perform a reproduction experiment using the same circuit diagram as the customer.
    I have sent the circuit diagram via private message, so you should be able to see it.
    I would like you to configure that circuit in an EVM and perform a reproduction experiment.

    VIN = 24V, no load, VOUT = 48V (register setting), VOUT connected directly to the FB terminal, VIN ON/OFF (10ms on/10ms off).

    The customer sets the VOUT output using register settings.
    Therefore, the FB terminal is directly connected to VOUT. Turning VCC ON/OFF in this state causes VCC2 to oscillate.
    Turn VCC OFF. The VOUT voltage will slowly decrease due to the capacitor. If VCC is turned ON again when the output voltage is completely at 0V, VCC2 will not oscillate.
    Turn VCC OFF. The VOUT voltage will slowly decrease due to the capacitor. If VCC is turned ON again while VOUT voltage remains, VCC2 will oscillate.

    From the above, it seems that the presence or absence of residual charge in VOUT is affecting VCC2 via the FB terminal, so I would like to confirm whether this is the cause.


    Please advise if there are any other possible causes.
    I need your help.


    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    this screen shot is from the EVM with:

    VOUT configured to 48V - no load

    VIN toggling between 24V and 0V with 100ms on/off

    Note: VCC2 goes to 3.8V due to the power save mode which gets enabled if EN/UVLO gets below the threshold.

    Best regards,

     Stefan

  • Hi Stefan,

    I am very grateful for your support.

    Is VCC2 in the red box oscillating?

    If you zoom in, I think it's the same VCC2 oscillation that customers have reported.

    Does VCC2 oscillate like this even when it's operating normally?

    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    In normal operation mode VCC2 is constant. Only when entering PSM or uSleep the VCC2 voltage will be decreased to save power

    VIN =24V, VOUT=48V, No load, MODE: FPWM

    VIN =24V, VOUT=48V, No load, MODE: PSM  -> VCC2 get decrease when entering PSM phase
    But should not apply here as based on the schematic MODE is connected to VCC2 so high.

    Best regards,

     Stefan

  • Hi Stefan,

    Thank you for your support.

    It's possible that I don't understand it properly.
    Is the VCC2 oscillation in the waveform below normal operating?



    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    yes, it is normal when using PSM mode - which the customer is not using based on the provided schematic.

    So. based on the provided schematic only the upper scope plot would apply.

    Best regards,

     Stefan

  • Hi Stefan,

    Thank you for your reply.

    The current customer's MODE pin is connected to VCC2, so it is not in PSM mode.
    By connecting the MODE pin to GND, it will enter PSM mode.
    Is my understanding correct?

    When the MODE pin is connected to GND, the PSM mode is activated, so will the VCC2 oscillation be eliminated?

    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    yes, on the first point your understanding is correct.

    On the second point this is not correct: as discussed before the device seems to get damaged and the oscillation in this case would come from something else. As you also can see with PSM mode the VCC2 voltage will step up and down with power save mode active or not. So with PSM you have VCC2 going up and down (but as normal function in this case). 

    Best regards,

     Stefan

  • Hi  Stefan,

    Thank you for your reply.

    I understand that the LM51776 in the EVM you evaluated was also damaged. Is that correct?
    If VCC2 is damaged, do you know the cause?

    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    no, the device on the EVM is not damaged and works as expected.

    Best regards,

     Stefan

  • Hi  Stefan,

    In your comment, you say "the device seems to get damaged." Which device are you referring to?
    Is it a customer device?
    Do you know what caused the damage to the device?

    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    as we already previously discussed the customer devices seems to get damaged as based on the description after the switch power cycle after that the VCC2 oscillations starts the output power could not be delivered anymore.

    As mentioned my assumption is a violation of the abs max ratings on SWx and/or HBx,

    Best regards,

     Stefan

  • Hi  Stefan,


    SWx, which you suspect is the cause, did not exceed the maximum rating.

    Are there any possible causes other than the maximum rating of the SWx terminal?

    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    VCC2 is mainly supplying the Gate drivers.

    So if the VCC2 gets damaged this could be due to:

    - something is connected to the VCC2 terminal beside the VCC2 cap (which is not the case as far as I know)

    - violation of the abs max ratings on LO1, LO2, HO1, HO2

    The most often violation happens on HO1 and HO2 generated by SW1/SW2 undershoots.

    Best regards,

     Stefan

  • Hi  Stefan,

    Thank you for your response.

    I'll summarize your answer for my own understanding.

    - VCC2 may be damaged.
    - There are two reasons why VCC2 may be damaged.
    (1) Something is connected to the VCC2 terminal, causing damage.
    (2) The ABS maximum ratings of LO1, LO2, HO1, and HO2 are violated.

    I understand that repeatedly turning the power on and off in a short period of time could cause the customer's board to violate the ABS maximum ratings of LO1, LO2, HO1, and HO2. Is my understanding correct?

    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    This is a very good summary and what i assume as root cause for this issue.

    Best regards,

     Stefan

  • Hi  Stefan,

    I still don't understand VCC2 oscillating. I'm sorry.
    The VCC2 you measured was oscillating, but this is normal operation.
    The VCC2 of the customer's device was also oscillating, but this was abnormal operation.
    I don't understand the difference between these, so please explain.

    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    in my measurements you can only see this VCC2 high and low phases when MODE is 0V - which is not the case in the customer application.

    I also always have a valid output voltage (in both cases MODE high and MODE low.

    Best regards,

     Stefan

  • Hi Stefan,


    Thanks for your answer.

    I understand that VCC2 oscillates or not in PSM mode and FPWM mode.

    Let's clarify this for now.

    The MODE pin is low: PSM mode, and high: FPWM mode.
    The customer's board is connected to VCC2, so it is in FPWM mode, but VCC2 is oscillating.

    In TI's EVM, VCC2 oscillates in PSM mode. In FPWM mode, VCC2 does not oscillate.

    Is my understanding correct so far?

    Are both of the waveforms below that you measured previously in PSM mode?


    Best Regards,
    Ishiwata

  • Hi Ishiwata,

    Your understanding is correct.

    For the measurement conditions please see the line under the images which describes the setup and also Mode pin setting.

    Best regards,

     Stefan

  • Hi Stefan,

    Thank you.

    It's in FPWM mode, but if you look closely, you can see that VCC2 is oscillating.

    Is the VCC2 terminal broken, just like the customer's board?

    Can you check the waveform with VCC2 enlarged in FPWM mode?

    Best Regards,
    Ishiwata