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Original question:

TPS92692-Q1: The Switch current limit of TPS92692

TPS92692-Q1: Voltage threshold (250mV/700mV) of the TPS92692

Damian Musialik
Prodigy 20 points

Part Number: TPS92692-Q1

Hi,

Who can explain me case with the threshold 250mV/700mV using internal PWM generator (10nF capacitor):

ad.1) when the DIM/PWM input is pulled-up by resistor to the Vref (5V);

ad.2) when the DIM/PWM input is pulled-down by resistor to the GND (0V);

ad.3) when the DIM/PWM input has 1.35V derived by voltage divider (1.35V);

...below picture as a hint

The multiplexer output (MUX out) will produce a signal that will switch between 700 mV and 250 mV at the PWM signal frequency.

...and what with the current flowing via Ris resistor and main N channel Mosfet transistor ???

TIA, Damian

  • 0
    TI__Expert 3820 points

    Hi Damian,

    The engineer responsible for supporting this device is on Thanksgiving holiday this week. He will answer your question when he returns on Monday, December 1st.

    Thanks,

    Jaron

  • 0
    TI__Expert 7660 points

    Hi Damian, 

    I'm not sure I fully understand your question, but this post can explain the difference between the different cases in which the threshold is set to 250mV or 700mV

    https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1530715/tps92692-current-limit-threshold?tisearch=e2e-sitesearch&keymatch=tps92692%2520700mv#

    Best,
    Daniel

  • 0 in reply to Daniel Louis
    Prodigy 20 points

    Hi Jaron,

    ...at the same beginning many thanks for your activity

    In this case, I have chosen the most credible answer in my opinion, underlined in yellow

     

    ...so, answer in the datasheet should sound that the upper threshold 700mV is related with the Spikes. I do not know that it goes such as without saying.

    OK, thank you in advance for this.

    Simultaneously, I have to be conscious of this spikes every time:

    - when I will turn on the PWM function from normal operation (from Vref=5V (100%) to 1.35V (17%) on the PWM/DIM input) and;

    - when i have PWM signal (from HIGH state to LOW and from LOW state to HIGH, etc.), 1.35V (17%) on the PWM/DIM input);

    - when I will back to normal operation from the PWM function (from 1.35V (17%) to Vref=5V (100%) on the PWM/DIM input);

    At the 10nF connected to the RAMP pin, f = 250Hz, so the spikes will be exist (can exist) at every PWM state change, i.e. from HIGH state to LOW and from LOW state to HIGH. If on the Ris=62mR the voltage will reach value close to the ~700mV but no more then 700mV (Ipk=~700mV/62mR=11Amps), should the PULSED DRAIN CURRENT of the main transistor be taken into account ?

    I think the worst case scenario is for PWM=50% and for the maximum PWM dimming frequency (frequency of the internal PWM ramp generator) Pdim=2kHz

  • 0 in reply to Damian Musialik
    TI__Expert 7660 points

    Hi Damian, 

    The pulsed drain current is typically much higher than the maximum continuous drain current. I recommend using a FET that has a continuous drain current rating close to double the maximum peak current you design for. 

    Best,
    Daniel