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TPS7H5001-SP: TPS7H5001-SP SYNC Signal

Part Number: TPS7H5001-SP
Other Parts Discussed in Thread: TPS7H5004-SP, TPS7H4010-SEP

Hello, 
I quote from the datasheet :
''Each controller can be used in external synchronization mode by leaving the RT pin floating and applying a clock to the SYNC pin. Note than the RT pin configuration sets the oscillator mode of the controller and must be left floating for this mode of operation. The external clock that is applied must be set to twice the desired switching frequency (i.e. a 1-MHz applied clock is needed for 500-kHz switching frequency). The external clock must be in  the range of 200 kHz to 4 MHz with a duty cycle between 40% and 60%. It is recommended to use an external clock with 50% duty cycle. The controller will internally invert the clock signal that is applied at the SYNC pin during this mode. Since the controller does not perform any switching with RT floating, the applied clock must
be present before OUTA and OUTB will become active for external synchronization mode. Figure 8-9 shows the switching waveforms for the controller in external synchronization mode. Note that the OUTB waveform is only applicable for TPS7H5001-SP and TPS7H5004-SP.'' 

Attached you will find a simulation where RT is always populated to give 250Khz Switching frequency and after 10ms a SYNC signal with 250 KHz is applied that seems not to change anything in the expected output voltage. 
the SYNC was changed to 500 KHz, also with a delay. it seems like the current is flowing out of the device before the SYNC signal and then into the IC when the SYNC signal is present. Nevertheless it reaches 2A and it doesn’t cause any change in the switching behaviour.


TPS7H6003_TPS7H5001_FB1_Working.zip
can you please check that and give feedback, is the simulation model accurate and the datasheet need to be changed ?
or the simulation model is not and the guideline in the daatsheet must be still followed. 

BR,
Mohamed
 


  • Hey Mohamed,

    The SYNC pin works only if the RT pin is not populated as the second sentence in your quote says.
    ''Note than the RT pin configuration sets the oscillator mode of the controller and must be left floating for this mode of operation."

    Thanks,
    Daniel

  • Hi Daniel, 
    Thanks for the info. we want to use this PWM in both oscillator and sync mode depending on the availability of the SYNC signal. 
    if we come up with a circuit that make the RT pin floating when the SYNC is there and RT pin not floating with the SYNC is not there, would this work in theory ? 
    do you have any reference designs from something like this ? in case not what would be the challenge for such a design ?

    BR,
    Mohamed

  • Hey Mohamed,

    Its something we do in testing, however not something we do in practice.

    The TPS7H5020 would work better for that purpose if you are able to use it.

    Thanks,
    Daniel

  • Hi Daniel, 
    I agree, the thing is that we need SR for the secondary side which TPS7H5020 don't offer.
    would it be easier to make SR with TPS7H5020 or adjust SYNC signal with TPS7h500x  

    BR,
    Mohamed

  • Hey Mohamed,

    I would say changing between SYNC and RT on the TPS7H500X device is not supported.
    Generating the SR signal might be your best path forward.

    Thanks,
    Daniel

  • Hi Daniel, 
    any starting point from literature review or references designs how to start on generating SR signal with TPS7H5020 ?

    BR,
    Mohamed

  • Hey Mohamed,

    I do not have any literature regarding discretely adding the SR signal with the TPS7H5020.
    It would be overkill, but I suppose you could implement the TPS7H60XX device to generate it.
    The HS driver can be "grounded" and used for the primary switch.


    The problem is then you have to then isolate it and add another driver on the other side.

    Thanks,
    Daniel

  • Hi Daniel,
    can you elaborate why this with the SYNC won't work ? assuming the circuit designed for that is robust. 
    you said you do this in the testing all the time, so what would be the problem in real implementation ? 

    to your suggestion, TPS7H60XX  should generate the SR signal for SEC side switch ?, since the PRI side switch will be controlled by TPS7H5020
    in the current design I was planning to use two drivers one PRI and one SEC and to out PWM controller on SEC side and use magnetic isolation to send th e signal in between. 

    BR,
    Mohamed

  • Hey Mohamed,

    The problem with SYNC is that the behavior of the device in a closed loop system switching between the internal oscillator and external oscillator is untested.
    We do it in open loop testing when we test the devices, but doing it in closed loop in a flight system isn't something we will "support" so to speak.

    The TPS7H5020 has a driver so I don't see the need for a primary side driver.
    I imagine a "perfect" system with the TPS7H5020 would just be a TPS7H5020 chip, some sort of logic for the SR, an isolator, and a secondary side driver

    The TPS7H60XX devices in PWM mode will generate the synchronous rectification signal, however the issue that I generally run into is that which output is which is fixed
    The high side will always output the input signal and the low side the "SR" signal.
    Which if you want to use the isolation in the TPS60XX device as the isolator makes it awkward to use, because it only ends up replacing the logic part of the "perfect" system


    Granted you could invert the output of the TPS7H5020; use that as the input to the TPS7H60XX devices.
    Then the LS output would be the main switch and the HS across the isolation be the the SR.
    Only works if you need less than ~200 V of isolation, but I've had requests for less isolation than that.

    Thanks,
    Daniel

  • Hi Daniel,
    Thanks for this elaboration, to be sure I followed everything, the path to a perfect system:
    TPS7H5020 on PRI side, TPS7H60XX on PRI side being fed TPS7H5020 control signal inverted, TPS7H60XX HS is used as SR signal on the SEC side. TPS7H60XX provide the isolation between PRI & SEC side, HS connected to SEC GDN , LS connected to PRI gnd
    what with this 200V of isolation ? what is meant with it ?

    other plan is 
    TPS7H5020 on PRI side, TPS7H60XX on SEC side being fed TPS7H5020 control signal (inverted or non inverted) sent through a magnetic isolation,  TPS7H60XX LS ( or HS in case it was inverted ) is used as SR signal on the SEC side, TPS7H60XX 2 Dies are connected to the same SEC GND.
    on both solutions we don’t need a driver for the PRI side switch; it is just about which side to place the TPS7H60XX. 

    another scenario that would shift all of these and will implement the need for CS transformer is to put TPS7H5020  on SEC side to have direct access of the output voltage, in that case TPS7H5020 SEC side, TPS7H60XX on SEC side with HS feeding PRI Switch and LS feeding the SR of the SEC side

    Did I get you completely ?
    do you believe that magnetic isolation would provide a worse behaviour if compared to inverting the control signal ?

    BR,
    Mohamed



  • Hey Mohamed,

    The TPS7H60XX devices have ~200 V of isolation between the LS die and HS die internal to the package.
    So if your design needs a low amount of isolation using the TPS7H60XX devices as an isolator makes some sense.

    The second way should work as well, just replacing an inverter with magnetic isolation.
    Generally I would prefer inverting the signal cause it would probably be smaller, but thats up to what solutions you have available.

    Thanks,
    Daniel

  • Hi Daniel,
    another scenario that would shift all of these and will implement the need for CS transformer is to put TPS7H5020  on SEC side to have direct access of the output voltage, in that case TPS7H5020 SEC side, TPS7H60XX on SEC side with HS feeding PRI Switch and LS feeding the SR of the SEC side

    would this work better ? I am aiming for high transient performance with tight DC regulation

    BR,
    Mohamed



  • Hey Mohamed,

    How much power/voltage/current is the plan for this flyback?

    Flybacks are generally not great with high transient performance.
    I might suggest a different design.

    Thanks,
    Daniel

  • Hi Daniel, 
    the output voltage would be +-8V with Imin 2.9A and Imax 5.5A for both rails, normally the +ve rail will carry 4-5x the negative current rail.
    we are expected to have 5mVpp and +-3% transient performance. we will be using PR to reach that goal. 
    would a flyback work well here ? 

    the direction I feel want to go with is to place TPS7H5020 on SEC side to get direct access to output voltage without any interfaces between.
    pass TPS7H5020 PRI FET signal through magnetic isolation.
    place TPS7H60XX on SEC side with HS & LS connected together ( since there is no need to use the 200V isolation), feed it TPS7H5020 PRI FET signal inverted in single input mode and feed HS signal to SR MOSFET. 
    any feedback to this implementation ?


    BR,
    Mohamed

  • Hey Mohamed,

    Flybacks are usually the best bet for multi-rail converters, the problem quickly comes up that it generally has poor transient performance and really high voltage ripple. At least for voltage ripple you can add something to reduce it. Transient performance is tricky to fix.

    You might be better off having a forward for the performance, and then do a buck-boost for the negative rail.
    TPS7H4010-SEP might do the trick there.
    https://www.ti.com/lit/an/snvaa76/snvaa76.pdf

    Thanks,
    Daniel

  • Hi Daniel, 
    that looks terrific but unfortunately this buck boost trick won't work because we need RAD-Hard QMLP or QMLV ICs, Moreover we need really low ASD (1mV @0.1Hz) so we would need a low noise LDO after primary regulation. 

    what we discussed before I think makes more sense, I still need to confirm the 200V isolation is ok, the question that poped in my mind now. 
    if we place TPS7H5020 & TPS7H60XX on SEC side and use TPS7H60XX in PWM mode and feed it inverted control signal from TPS7H5020. 
    it makes more sense then to use the HS driver for SR rectification on SEC side and LS driver for PRI switch to be able to adjust the deadtime. 
    in other words I am using TPS7H60XX two outputs to supply both FETs instead of only using the SR signal from TPS7H60XX  and PRI FET signal from TPS7H5020. 
    wouldn’t this give a better control ? 

    in case 200V won't work in that case TPS7H60XX  would still be placed on SEC with only one SEC GND, in that case no inversion is needed and the HS of GD would be PRI side switch and LS SR switch, the only addition that magnetic isolation would be needed to transfer the PRI switch signal from SEC to PRI with downside that this will introduce a certain delay that we will have to live with.
    does this make sense ?

    Thanks!
    Mohamed

  • Hey Mohamed,

    I'll reiterate, using a flyback for the specifications you mentioned would not be pretty.

    Also I reread through what you were requesting and didnt quite realize the second rail needed >5 A which would also be extremely difficult to do.
    Without some sort of post regulation for the flyback, I dont see how you really achieve +/- 3% transient performance and 5 mVpp voltage ripple.
    At least on the positive rail you could post regulate with a buck, but the negative rail becomes difficult.

    Thanks,
    Daniel

  • Hi Daniel,
    I think I mentioned this before, that I plan to use PR as LDO for each and all the voltage rail. these LDO will take the positive and negative output of the flyback and these LDOs should be  giving the 5mVpp ripple and +-3% transient limit. Moreover this 5.3A is for +8V and -8V together where +8V would consume 4.5A and -8V would consume 0.8A, these 4.5A is divided as two input currents for the LDO we spoke about in the beginning. 
    a Single flyback can deliver 5.3A max, I believe this won't need a forward converter, you agree ? 

    what about my last suggestion in the message before, as after checking 200V isolation of gate driver won't fulfil our PRI-SEC isolation. 

    BR,
    Mohamed

  • Hey Mohamed,

    Thanks for clarification on what the specifications are, I believe what you described should work.

    You can place the 5020 and 60xx device on the secondary side and bring over the 60xx signal from the driver to a different driver on the primary side.
    That would be able to work.

    Thanks,
    Daniel

  • Hey Daniel, 
    why do we need another driver on the PRI side ? because we are crossing between PRI & SEC ?
    how to know the output current on the 60xx HS and LS driver ?
    I am asking to know what type of isolator I need that would be able to withstand and supply this current.

    BR,
    Mohamed

  • Hey Mohamed,

    Generally with the sensitivities of GaN FETs its recommended to not run the gate through magnetic isolation and actually have a driver directly to the gate.

    The output drive is listed in the datasheet.

    Thanks,
    Daniel

  • Hi Daniel, 
    understood, I have 2 concerns left: 

    1) as we said 5020 has the gate driver built-in which can output up to 1.2A Transient current sending this signal from SEC to PRI side would be troublesome. No isolators IC can handle that, I have simulated some discrete implementation but it doesn't look pretty. any ideas here ?
    it looks like that 5020 can only be placed on PRI side to feed the Gan FET directly and then using ultra fast isolators to send the output signal from SEC to PRI side, since we won'T expect a high current in the sensed voltage signal. do you agree ?

    2) let's say we placed 5020 on PRI side, how would we send control signal it to the other side for SR ?

    it is easier to send PWM signal from one side to the other since it has maximum of +-10mA but PWM+Gate driver signal I am struggling if there is an efficient way to do that. 

    BR,
    Mohamed

  • This was partially solved offline

    Thanks,
    Daniel