[FAQ] UCC27735-Q1: How can I build a circuit to generate a negative turn-off voltage?

Part Number: UCC27735-Q1
Other Parts Discussed in Thread: UCC27624, UCC27735, UCC27301A, UCC27734

In Fundamentals of Gate Drivers section 6, there is a description of how to use AC coupling to create a negative gate voltage. Wide-bandgap devices such as SiC FETs and GaN FETs often benefit from a negative bias as it increases the FET’s immunity to miller turn on (dV/dt immunity). The negative turn-off voltage ensures that the gate voltage does not exceed the V_TH despite miller injection as shown below.

Drawing showing how negative turn-off voltage keeps the miller noise below V_TH

Level-shifting OUT using AC couple and Zener diode

The above circuit is a low-cost alternative to using an isolated DC/DC converter, charge pump, or inverting buck-boost converter for negative bias. The circuit works by using a Zener diode across V_GS to charge C_N to VDD – V_Z during turn-on. Then, in the off state, the other series diode prevents C_N from discharging and maintains a negative voltage on V_GS. Essentially, C_N level-shifts the OUT voltage down from 0-VDD by (VDD – V_Z). Here are some basic equations:

Here is an example system using UCC27624 and an 18V Zener diode:

System Schematic used on Bench

50% duty cycle pulse train to show startup behavior

1% duty cycle in steady state

The circuit cannot hold the V_GS negative in a DC state, but with correctly sized components it can hold V_GS negative for 100’s of µs or even milliseconds. The negative voltage does not depend on duty cycle as long as the minimum on-time to recharge the C_N capacitor is met. The series capacitor should be around 100X larger than C_GS to minimize ripple and hold the negative bias for longer off periods.

The circuit enables standard gate drivers such as UCC27624, UCC27735, or UCC21550A to drive SiC FETs with a negative bias. Additionally, the circuit enables drivers with >5V UVLO such as UCC27301A or UCC27734 to drive GaN FETs with negative bias.