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AM62D-Q1: AM62D - Power Management of Peripherals and Cores

Part Number: AM62D-Q1

Hi,

We are working on runtime power management on AM62D and need some clarification.
Peripheral power control:
I am using Sciclient_pmSetModuleState() to power OFF peripherals and Sciclient_pmGetModuleState() to check their status.When I powered OFF MCASP, its state shows as OFF, but UART remains powered ON.Is Sciclient_pmSetModuleState() the correct API to power OFF peripherals at runtime, or any other additional steps required?
Core power control:
1. What is the correct sequence to power ON and OFF a specific cores such as A53 or C7x at runtime?2. Are there any prerequisites before powering OFF a core?
Any pointers to documentation or examples would be helpful.

  • Hello Sowresh,

    Controlling power to individual IPs can be tricky.

    In the SoC, power management is handled through LPSC modules. If an LPSC module controls an IP, you can manage the power state of that particular IP. However, in some cases, a single LPSC controls multiple IPs, so controlling one IP may impact other IPs as well.

    Additionally, some LPSC modules cannot be controlled through software. By default, these LPSCs are always ON, and software-based control is not supported for them.

    You can find detailed information about LPSC behavior and control in the TRM under the LPSC section.

    From the software side, LPSC control can be done using the API mentioned above.

    Regards,

    Anil

  • Hello Sowresh,

    Controlling LPSC for IPs is possible. However, it is not recommended to control core LPSC.

    If a core LPSC is powered OFF and then turned ON again, the core will come out of reset. In such cases, the entry point must be reconfigured and all peripherals need to be re-initialized, which introduces several challenges.

    Due to these reasons, controlling core LPSC is not a recommended approach.

    Regards,

    Anil