Part Number: UCC28C43-EP
Hello,
We are using UCC28C43MDREP in our design.


Input voltage range : 180V - 320V , Switching frequency : 100kHz
Output voltage1 - 15V , Max Load Current - 0.5A
Output Voltage 2 - 20V_ISO , Max Load Current - 0.120A
We are using a transformer with inductance 2.2mH and turns ratio as
36(Primary) : 3(Output Voltage1) : 4(Output Voltage2)
When tested at below conditions:
At Conditions:
- Vin = 320VDC, Output Load1(15V) = ~330mA and Output Load2(20V_ISO) = 80mA . Ripple of 1.182V is observed on 15V Output.
- Vin = 180VDC, Output Load1(15V) = ~330mA and Output Load2(20V_ISO) = 80mA . Ripple of 1V is observed on 15V Output.
- Vin = 180VDC, Output Load1(15V) = ~50mA and Output Load2(20V_ISO) = 80mA . Ripple of 0.782V is observed on 15V Output.
- Vin = 320VDC, Output Load1(15V) = ~50mA and Output Load2(20V_ISO) = 80mA . Ripple of 1.022V is observed on 15V Output.

Ripple frequency is varying from 200Hz to 2kHz in the above conditions.
Currently we have 47uF(tantulum) + 47uF(tantulum) = 94uF output capacitor on 15V line.
To debug the issue:
- We replaced one 47uF with 100uF(tantulum) resulting in 147uF output capacitance. No major improvement observed on ripple. Still ~1V observed on 320VDC Input at ~330mA load on 15V.
- Later added additional 22uF Ceramic capacitor on 15V Line with ESR of about 0.2ohm at 200Hz. No major improvement observed.
3. Later , we modified the compensation circuit connected to FB and COMP Pin, by replacing C72(Ccomp) to 2.2nF( to reduce ripple). No imprvement observed there as well. Also we are observing COMP voltage varying from 4.46V to 2.3V in this condition. Why is it so?

4. Since no improvement observed in any of the conditions, we removed both C72(Ccomp) and R53 (Rcomp) retaining only C53. At this condition , Vout ripple reduced to 500mV but not clean. Also Comp voltage varies from 4.720V to 280mV.

Could you please help us on reducing the ripple as soon as possible.