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UCC28C43-EP: UCC28C43-EP: Higher Output Voltage Ripple

Part Number: UCC28C43-EP

In continuation to previous query:

 

UCC28C43-EP: Higher Output Voltage Ripple - Power management forum - Power management - TI E2E support forums

Sense resistor is updated to available 600mohm as suggested.

Below are the observations:

  1. With previous sense resistor 2E,

With load of 148R ie ~100mA on 15V Output, Observed 15V Ripple voltage(yellow waveform) is 800mV pk-pk and COMP voltage is varying from 2.44V to 3.72V.

image.png

2. With updated  sense resistor 600mohm,

With load of 148R ie ~100mA on 15V Output, Observed 15V Ripple voltage(yellow waveform) is 416mV pk-pk and COMP voltage is varying from 1.56V to 2.04V.

image.png

Expected load on 15V is about 500mA.

But when tried to load 15V to ~350mA , it is going to cycle by cycle current limiting mode with 600mohm sense resistor.

 

Could you please help us reduce the ripple and as well load 15V upto 500mA. 

 

  • Hi Asha, 

    It looks like decreasing the current sense resistor is definitely helping with stability at the COMP pin, which is reducing your output voltage ripple.

    Based on this observed result, I would guess that your feedback loop has a very low phase margin which is making the system unstable. To address this, the gain of the feedback  loop can be reduced by a bit, such that phase margin is improved. We actually did this when we reduced the gain of the feedback loop by reducing the value of the current sense resistor. 

    To further reduce the gain, you can decrease the value of R53. Right now, it is set to 4.7k - you can try going down to about 1k. You can also increase the value of C53 to about 10uF. Please try these changes one at a time and observe the result. 

    Regarding your question about the current limiting, I'm not sure why a reduced current sense resistor would limit the current. Please probe directly at the CS pin and colelct the waveform when  your load is 350mA.

    Thanks,

    John

  • Hello John,

    Thank you for the suggestions. We shall do the necessary changes and come back to you with the results.

  • Hello John,

    We did update R53 with 1k retaining sense resistor of 600mohm. Ripple has increased way higher to 1.74V at ~100mA load.

    Is there any calculator or specific formula to determine the value of compensation circuit?

    Also Regarding current limiting at CS Pin , we tested again and that was due to the current limit set on input DC Source. So, it is fine now.

    But we are still facing higher ripple issue. We are yet to test C53 with 10uF. In this case , should we have to revert back R53 to 4.7k?

  • Hi Asha, 

    Yes, revert R53 back to 4.7k and try to reduce the current sense resistor further. After this, if no improvement, change back to 600mohm and change C53 to 1uF.

    For more information on loop compensation, check this application note: 

    /cfs-file/__key/communityserver-discussions-components-files/196/switchingpower_5F00_compensation.pdf

    I would suggest to read it to its entirety to have the background needed for power supply compensation. For more specific information pertaining to your design, you may check the section on current-mode flyback, type II error amplifier, and current-mode buck-boost compensation strategy. 


    You can also refer to the Power Stage Designer Tool. You may select 'Loop Calculator' in the top left, then select 'CMC Inverting Buck-Boost' for the Control Scheme, and "Type II" for the Compensation Network. Then, you can play around with different R and C values in the compensator to achieve a healthy crossover frequency and phase margin.

    Thanks,

    John 

  • Hello John,

    Regarding your suggestion of reducing the sense resistor , earlier when we had 2ohm sense resistor we observed duty cycle was limited to max 40% as we intended to have in our design as it is expected to work in DCM Mode. 

    But now since we reduced to 600mohm , we observed duty cycle going high to upto 50% to 55%. Since we have limitation of duty cycle restricted to 40% , should we still reduce the sense resistance?

    Thanks,

    Asha C

  • Hi Asha, 

    I don't see how the duty cycle can increase. Since you are operating at a fixed switching frequency in DCM, the peak current must stay the same according to P = 1/2*L*Ipk^2*fsw. In this equation, P, L, and fsw are fixed, meaning that Ipk must also be fixed. Since Ipk must stay the same, the on-time, or duty cycle, must remain the same to deliver the same amount of power.

    When you change the current sense resistor, you are simply changing the gain of the feedback loop. 

    Please reduce the current sense resistor to about 400mohm and report the results. 

    Thanks,

    John

  • Hello John,

    The Power stage designer which you suggested for loop calculator has a clause saying it is only for CCM mode , we are running in DCM Mode.

    Is there any alternative?

    Thanks!

  • Hi Asha, 

    The power stage designer loop calculator tool can provide good approximation if you are operating near the boundary of CCM/DCM. 

    Have you tried reducing the current sense resistor further?

    Thanks,

    John

  • Posting your update from the new thread that was made below:

    Hello John,

    In continuation to our previous query:

    UCC28C43-EP: UCC28C43-EP: Higher Output Voltage Ripple - Power management forum - Power management - TI E2E support forums

    1. Sense resistor was reduced to 400mohm , around 258mV ripple is observed when ~100mA loaded on 15V. Blue represents output voltage ripple and yellow represents comp pin voltage in the below waveform. Also we observe overshoot on rising edge and ramp down is not smooth. What is the reason for this behaviour.

    image.png

    2. When C53 was increased to 1uF , with R53 - 4.7k and sense resistor 400mohm, around 3.220V ripple  is observed on 15V output.

    image.png

    What is the reason for oscillating COMP Pin voltage?

    3. Also due to reduction in sense resistor, there is higher primary current due to which secondary current is also increasing and secondary diode2(20V_ISO output) is going bad which is 100V , 2A Rated.

    So reducing sense resistor would be challenging in our design since we have to size up other components.

    4. We did not see ripple improvement either by reducing R53 to 1k or increasing C53 to 1uF.

    Is there any other suggestion?

    5. Just as a trial , we removed C72(10nF) , retaining same values as per schematic ie 2ohm sense resistor , having only C53 100pF on compensation circuit ,  we see ripple of maximum 500mV for maximum load of ~350mA. But in this case we see oscillations on COMP Pin as below. Also ramp up on ripple voltage is not smooeth. yellow is output voltage ripple and blue is COMP Pin voltage.

    image.png

    Can we go with this approach? will there be any issue because of this? Why are we observing oscillations on COMP Pin?

     

    Thanks!

  • Hi Asha, 

    Sense resistor was reduced to 400mohm , around 258mV ripple is observed when ~100mA loaded on 15V. Blue represents output voltage ripple and yellow represents comp pin voltage in the below waveform. Also we observe overshoot on rising edge and ramp down is not smooth. What is the reason for this behaviour.

    The ripple has improved here because your loop is now stable with the lower sense resistor. The shape of the ripple is related to your on-time, off-time, and switching frequency. The COMP voltage is stable. This is the lowest ripple you can achieve with your existing value of output capacitor and switching frequency. If you would like to decrease the ripple, you would have to increase the switching frequency and increase your output capacitance. Of course this would also change your loop response, so you would have to re-tune that as well....

    2. When C53 was increased to 1uF , with R53 - 4.7k and sense resistor 400mohm, around 3.220V ripple  is observed on 15V output.

    Looks like this did not make the system more stable. My intended purpose for this exercise, was to see if the loop gain would increase (stability) by decreasing the loop gain. 

    3. Also due to reduction in sense resistor, there is higher primary current due to which secondary current is also increasing and secondary diode2(20V_ISO output) is going bad which is 100V , 2A Rated.

    So reducing sense resistor would be challenging in our design since we have to size up other components.

    Please provide the FET current waveforms measured with a current probe, as well as the switch node voltage. I would like to compare these to understand why there is higher peak current. 

    4. We did not see ripple improvement either by reducing R53 to 1k or increasing C53 to 1uF.

    Is there any other suggestion?

    Try different values of R53 while keeping C53 with a low value. 

    5. Just as a trial , we removed C72(10nF) , retaining same values as per schematic ie 2ohm sense resistor , having only C53 100pF on compensation circuit ,  we see ripple of maximum 500mV for maximum load of ~350mA. But in this case we see oscillations on COMP Pin as below. Also ramp up on ripple voltage is not smooeth. yellow is output voltage ripple and blue is COMP Pin voltage.

    This is not recommended, the system is not stable and there will be unpredictable variations between different units. 

    Thanks,

    John