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UCC21710: Ti Gate Driver IC UCC21732 VS UCC21710

Hardik Shah
Prodigy 20 points

Part Number: UCC21710
Other Parts Discussed in Thread: UCC21732

Hello,

We are using UCC21732 for our current project and looking for some technical information regarding UCC21710 VS UCC21732. If you can guide me to correct field engineer would be great. My question is as below.

I would like to know that when signal on the OC pin of UCC21710 goes higher than Vocth for more than Tocfil duration and OC protection with "soft turn off" starts but right after that signal on IN+ goes low (driven by MCU), will the "soft turn off" process continues to slowly turns off the GATE through OUTL or immediately turns off the GATE through OUTL?

Which has priority during soft turn off process, IN+ or soft turn off timing over OUTL?

Secondly, want to know if the same situation occurs with UCC21732 which one will have priority, IN+ or "2 stage protection" over OUTL signal?

image.png

 

Thanks

  • 0
    TI__Expert 3267 points

    Hi Hardik,

    For both devices, the protection sequence takes priority over the IN+ once a fault is detected. After an over-current event is detected, soft turn-off is initiated and nFLT goes low. The output is held to LOW after the fault is detected and can only be reset by the RST/EN pin.

    Best Regards,

    Muiz Ishola.

  • 0
    Prodigy 20 points

    Hello Muiz,

    I have understood your answer but  want to put it in simple words. Once protection sequence starts  (Soft turn off or 2 stage protection) due to over current, IC will complete the sequence regardless IN+ goes low as suggested in picture. Means falling edge on IN+ will NOT immediately force Gate signal to go low. 

    In such condition, Mosfet will be partially ON  during protection sequence time duration and can cause shoot through if used with another Mosfet in Half Bridge configuration.  Any suggestion for such scenario?

    Thanks

  • 0 in reply to Hardik Shah
    TI__Expert 3267 points

    Hi Hardik,

    Hardik Shah said:
    Once protection sequence starts  (Soft turn off or 2 stage protection) due to over current, IC will complete the sequence regardless IN+ goes low as suggested in picture. Means falling edge on IN+ will NOT immediately force Gate signal to go low.

    Yes, that's correct.

    Hardik Shah said:
    In such condition, Mosfet will be partially ON  during protection sequence time duration and can cause shoot through if used with another Mosfet in Half Bridge configuration.  Any suggestion for such scenario?

    The FLT signal goes low before the soft-turn off sequence is complete. You can design your system such that once the FLT signal goes low, the MCU stops sending input signals to the gate drivers. In addition, the second gate driver would also detect the DESAT or overcurrent event in the scenario you suggested.

    Best regards,

    Muiz. 

  • 0 in reply to Muiz Ishola
    Prodigy 20 points

    Thanks Muniz. This answer my question.. I will contact further if required. 

  • 0 in reply to Hardik Shah
    Prodigy 20 points

    Hello Muniz,

    During protection stage, OUTH and OUTL, both pins go to HiZ state. What is the Gate charging current coming out during this time from OUTH pin? If we want to provide external mosfet to pull the Gate Pin low and bypass the protection stage, we want to know that it will not damage the IC.

    Thanks

  • 0 in reply to Hardik Shah
    TI__Expert 3267 points

    Hi Hardik,

    If the output pins are Hi-Z, it means there is no significant gate charging current.

    Best regards,

    Muiz.