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UC3824 dead time

ziopaper
Intellectual 940 points
Other Parts Discussed in Thread: UC3824

Hi there,

I have a question regarding UC3824. The datasheet reports deadtime vs timing capacitor, and deadtime vs frequency. It also reports the output waveforms and shows the non-overlap time as difference between the instant in which one output is at 50% on falling edge and the inverted output is at 50% on rising edge.

What is the relations between the non-overlapping time and the deadtime? 

While testing the IC, the output waveforms are never low at the same time (as in the datasheet showing the non-overlapping), so what is the meaning of the deadtime selectable with the timing capacitor?

thanks

Marco

  • 0
    TI__Mastermind 25130 points

    Marco,

    The dead time appears to be the time necessary to discharge the Ct and has to do with the setting of the frequency.

    If you look at the logic diagram there should be no time when both outputs are at groundand when both =outputs are high.since the same signal is going into a pair of NOR gates and then into buffers one of which inverts.

    Regards,

    John