LP8725: PWR_ON, PS_HOLD?

LP8725 has two operating modes which are PMU mode (CONFIG = VIN1) and Sub-PMU (CONFIG = GND) mode.  In case LP8725 is the main PMU in the system, PMU mode should be considered.

In PMU mode, PWR_ON is the trigger signal for PMU startup and LP8725 will start turn-on sequence if PWR_ON is high longer than 30ms of debounce time.  About 30ms later, RESET_N will released and now the host processor will be able to run its software codes.  Once the booting sequence is done correctly, the host processor is supposed to tell LP8725 that the power supply outputs should remian ON, by pulling high PS_HOLD (completion of startup sequence).  Once the startup sequence is completed (PS_HOLD goes high while PWR_ON is still high), LP8725 ignores PWR_ON signal (No cycling).

As long as PWR_ON is high, LP8725 will remain ON even though PS_HOLD stays low.  However, if PS_HOLD is still low (Booting Failure?) when PWR_ON goes low, LP8725 will start shutdown sequence.

 If LP8725 is not the main PMU in the system or PMU startup is not triggered by the user (PWR_ON/ EN is always high), I would recommend Sub-PMU (CONFIG = GND) mode which does not have PS_HOLD signal.  In this mode, EN pin simply is used for power ON/OFF control.

If you can give me more detail how LP8725 is used in your system and which device option you consider, I think I can give you better suggestion.

Thanks, this is very useful.

The LP8725 will be the only power supply, so have to use PMU mode.

It sounds as though it should be OK for us to just tie PWR_ON to VIN1.

From what you're saying, the PS_HOLD rising edge is important (the data sheet doesn't seem to say this explicitly), so we should drive it from the MCU as you suggest. This is not quite as simple as just tying it high, but is workable.

We hadn't planned on using RESET_N, rather relying on the (MSP430) SVS to hold off Power On Reset until the voltage rises high enough. We figured this would allow us to use a programming header as an alternative power source. Is this a bad idea?

Let me try to understand your system power ON/OFF requirement better by asking a couple of questions.

It looks like you want LP8725 to be turned on whenever the system supply voltage (VDD) is applied.  How do you want to turn off LP8725? Do you need to turn off LP8725 while VDD is present?  If the answer is yes, it is not a good idea to connect PWR_ON to VIN1 (or VDD).

If you just need to turn on LP8725 whenever the system supply voltage is present and would not expect LP8725 to be turned off before the system voltage is lost, then I think Sub_PMU mode would be better choice because you don't need to worry about PS_HOLD.

Regarding RESET_N, I don't see issues as long as MSP430 guarantees enough time for all the output voltages of LP8725 become stable after the power-on.

Thanks, this is more and more useful.

This is the only PMU in the system, and we only need it to switch on if power is supplied and off if power is removed. If we shut down the PMU, the entire system is dead. The way I read the data sheet, this is what PMU mode is for.

(We're not interested in the shutdown feature; we're primarily interested in on-the-fly supply voltage variation, though the Analog LDOs are a nice extra.)

That said, in sub-PMU mode we would use EN instead of PWR_ON , which is almost the same (same pin even). However, PWR_ON is a level-trigger, and EN is an edge-trigger, so driving EN off of VIN1 doesn't seem right -- once VIN1 reaches UVLO, it's already high (so no edge). EN can't be driven by the MCU, since the MCU won't start without the LP8725 reaching IDLE mode which it won't without the EN rising edge.

BUCK2 needs to run all the time, so I guess for sub-PMU mode we'd just tie EN_B2 high (?).

Or have I mis-read everything?

In Sub-PMU mode (CONFIG = GND), EN is level sensitive, too. (I confirmed this with an EVB.)  So, LP8725 will start power up sequence even when the supply voltage is applied to VIN1 and EN at the same time.

When CONFIG = GND (Sub-PMU mode), the enable control of Buck2 output is OR logic of B2_EN pin and BUCK2_EN register (ADDR 0x00, Bit4).  BUCK2_EN bit is high ("1") by default with most of LP8725 options (except for LP8725-A with DEFSEL = VIN1), so that B2_EN pin can be left floating (internally pulled down to GND).

Which LP8725 option are you considering using in your system?

ChiYoung Kim said:

(I confirmed this with an EVB.)

There's an EVB for this device? That would be useful -- prototyping with bumped devices is not so easy. Are these purchase-able?

ChiYoung Kim said:

Which LP8725 option are you considering using in your system?

I don't think LP8725 EVBs are avallable for sale.

I have an old EVB for internal use.

I will take a look if I can find another one (old version, too) for you,