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TPS54260 Simulation

Other Parts Discussed in Thread: TPS54260

Hi there,

I have decided to usee the TPS54260 switcher regulator and recently learned how to use the switcher pro application.

After some iniytial attempts I tried to reproduce the 10.8V to 13.2V Input voltage for 3.3V and 2.5A output. but have realized that the circuit produced by the simulator is not the same as the one that appeard on the datsheet.

Can anybody give me some comments on the subject ? I know that a circuit can be sligtly different if a makeup is done by hand and would like to know if this is the case or the application may have some problem.

Thank You.

Best Regards, JUAN PABLO

  • That is not unusual.  The datasheet design uses simple approximations and basic calculations for the design.  Switcherpro has more complex algorithms that would be too tedious and time consuming for manual calculations.  For most calcultaions such as output inductor value, slow start capacitor and voltage set point resistor divider, thae calculations are basically the same.  Fot output capacitance,the switcherpro software tends to provide lower values.  The circuit will work fine, but if you have strict transient requirements, you may fing you need more output capacitance than switcherpro recommends.  A little experience goes a long way here.  Loop compensation is another matter.  The data sheet equations work fine for that example, but may not be applicable to every situation.  So far as I know, the switcherpro designs will all work well.  But personally, I prefer to use psipce modeling for loop compensation design. 

  • Hi Jack, thanks for your reply - your comments have been very helpful

     

     I do have some concerns regarding transients and wonder if you may have some comments regarding the following:

     

    1.- I designed a device with a LiOn battery pack array "BPA" (8 cells in series for a 33.6 to 28.5 V delivery)

    2.- Al initial tests have been made using linear regulators

    3.- The BPA feeds three different power sources: +24VDC; +12 VDC and +3.3 VDC

    4.- The +24 VDC is the supply for a +6VDC Solenoid, settled to work according to a 6% Duty Cycle. The solenoid is activated by a driven P channel MOSFET. The Mosfet will drive two +24VDC/ 350 ms pulses, separated by a 300 ms 0V time gap, within a 17 seconds repetition frequency.

     

    *** Questions

    a) If I use the TPS54260 switching regulator, should I expect instability issues when signal exposed in point 4 above is in progress, very specifically when triggering the Solenoid ?

    b) According to point 3 above, what is better: Using the BPA to feed each power source for the desired +24; +12 and +3.3 VDC outputs individually or Starting from BPA to produce +24VDC regulated output and from this output feed the next regulator in series to produce a +12VDC output and thereupon feed a 3.3 VDC output regulator ?

     

    Perhaps you may recommend some documentation where I can learn a little more on the subject of placing switching regulators in parallel and/or in cascade.

     

    Thanks again, JP

  • You might start with posting a block diagram.  That may be easier for us to follow than a text description.

  • Hi Jack, Thanks again for your support and sorry for any inconvenience with previous replies on my behalf.

    I have improved my design after several iterations with the switcher pro application and have decided to use TPS 54260 for all regulators shown, i.e. S0; S1; S2; S3. FInally,  I have decided to proceed as shown on the Block Diagram; however I still have a remaining question, regarding athe use of a Bipolar Transistor within the design:

    Question.- Is it possible to consider a current enhancer through the bipolar transistor "Q" shown on the diagram. I am inclkuding it to be sure the current through the load (SOLENOID) is assured. Even though the load will draw 1.8A during  two 350 ms trigger pulses separeted by a time lag of 300 ms, I would like to have a 3 Amp to 4 Amp protection. Please advice.

    Best regards, JP

  • First off let me say I am a little uncomfortable with VIn min = 25 V and Vout = 24 V.  That will have the TPS5426o running near 100 % duty cycle.  Under certain conditions that device can lose enough BOOT charge to trip the BOOT UVLO circuit.  The device wil still operate but you may see 2.1 V ripple on the 24 V output.

    I do not think that the Q1 is a good idea.  If you need higher peak current, then I think a controller with external FET would be better to generate the 24 V intermediate bus voltage.

     

  • Thank you for your reply.

    You are right with the Vin Min, which I readjusted to be +26VDC but realized I had not corrected on the sketch I already sent to you. Regarding the simultor, when data is entered to it with Vin Min +25VDC it fails, but using Vin Min +26 it solves the problem. I'm a little worried with the Peak current for the +24 VDC regulator. This power sorce must be allocated within Device N1 of the drawing, so any current enhancement must be kept within component 1, that by the way is physically separated of component 2.

    Will do the homework on the FET approach you suggested. If any doubt on my behalf, may I contact you again ?

    Thank you JP

  • Do you think  Texas Instruments LM 5060 could be the right external controller ?

    http://www.ti.com/lit/ds/snvs700e/snvs700e.pdf

    Any other suggestion, for the controller and the external FET ?

    Thanks JP

  • I do not support the TPS54260 any longer, I was just giving some advice as I have worked with that part a lot in the past.  I don't support any of the controllers either.  You might make a separate post to inquire about the controller.

  • Thank you Jack - You have been extremelly helpful. I can now see the end of the tunnel through your help ... and it´s not so far.

    Thanks again and have a great day    :-)

    Cheers, JP