We built a (somewhat) simple proto board to test the LP8725. It contains an MCU (MSP430), a flash chip, an RF chip, and a few others.
Observed behavior is that the LP8725 appears to reset frequently.
Details are:
- Device is LP8725TLE (baseline, not one of the A-D variants). All registers are at default.
- CONFIG=DEFSEL=DVS=0 (GND) [sub-PMU]
- EN=VIN1=VINB1=VINB2=Vin (roughly 3.5V) [Always enabled when powered.]
- BUCK2 (FB2) feeds VCC to most of the board. BUCK1 (FB1) is fed back into VIN3 to supply LDO4. VIN2 is not connected.
- SDA, SCL, and RESET_N are pulled up to VCC (FB2) using recommended values. RESET_N comes out to a test point but is not otherwise used.
- B2_EN is not connected (it reads as constant 0V).
- The MCU code has been shaved down to only: de-select the RF and NAND chips, turn on an LED, and then spin (LPM0). Startup shouldn't take longer than a few 100s of usec.
- Vin (primary power) is supplied by a fairly strong battery, measured at 3.45V. There is maybe 100mV of ripple.
- My DMM reports 4mA being drawn. This is higher than I would expect, though this might be averaging of draw over the frequent chip startups. Still, it is well within the capacity of the battery, and I see no Vin "events" correlated with the resets.
Symptom: Watching RESET_N, I see it repeatedly cycle: de-assert (high) for anywhere from 10-200ms, then re-assert (low) for 35-70ms. While RESET_N is high, BUCK1 (FB1) is at 1.0V and BUCK2 (FB2) at 1.8V (as expected), and they drop to 0V in synch with RESET_N (as expected).
At 4mA draw, thermal shutdown seems improbable. Are we violating some rule somewhere? Are there any other things we could be doing to this chip to trigger this behavior?