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tps54386 has a 1.5Voutput without a enable

Other Parts Discussed in Thread: TPS54386EVM, TPS54386, LM317


    My PCB include the power circuit the same as TPS56386EVM,the diffrerents are:the power supply is +5V,the VOUT1 is +1.8V while the VOUT2 is +3.3V. In VOUT2 part,I cut R10.

When I disable EN2(float),the output of VOUT2 is +1.5V.

How can I solve this question.

  • Does anyone have The TPS54386EVM  Board?

  • Hi Lee,

    Welcome to the forum. I'm taking a look at this and have a few questions. I do not have an EVM to look at this myself but have one on the way. I will assume the input voltage is active at 5V for the testing.

    1. While EN2 is floating, is the device active? Please check this by looking at SW2.
    2. Is there any load on VOUT2 for these tests?
    3. Can you show some oscilloscope screenshots or give a time scale for your image?
    4. What happens if you float EN2 before applying the input voltage, does VOUT2 still rise to 1.5V?


  • Hi Anthony,

    Thanks for reply my question.I found the reason with your prompts.There is a load connect with VOUT2.When I disconnect the load, VOUT2 is correct,at the same time,the volatge at the pad in the load which was connectted with VOUT2  is pulled up to 1.5V for some reason. I guess maybe other power supply's cross talk. What's your opinions?

    By the way,does the problem will damage my circuit.?

    best wishes,


  • Lee,

    Good to hear you found the source of it.

    An external 1.5V applied to VOUT2 of your TPS54386 circuit will not damage the IC. One reason being because this is non synchronous with a diode as the low side switch it will not try to sink any current during startup.

    What is the load for VOUT2? I cannot comment much on it without knowing what it is.


  • Anthony,

    There is a diagram behind.The TPS54386 offer two power supplies(VDD_3V3,VDD_1V8) to one FPGA and one DSP(DM6467).VDD_3V3 is for IO's power supply while VDD_1V8 is for DDR core(DSP) and core (FPGA)power supply.There are three ICs communication with FPGA,they are supplied with separate LM317 which are adjusted to +3.3V.

    The problem comes here.First,I disable the TPS54386 by left all EN pins float.When I remove all LM317,the cross_talk 1.5V disapper.When I add LM317 to the circuit one each time,I find cross_talk 1.5V come back with  LM317 except one.So I guess this LM317 cause the cross_talk 1.5V from the IOs connect with FPGA,but this is difficult to understand.

    How do you think about this,and how to avoid this?