TPS54494 LDO Output

Victor Levandovsky

Other Parts Discussed in Thread: TPS54494

Hello,

From TPS54494 Datasheet (TPS54494 SLVSBH1 –JUNE 2012) page 5

REF1. ""VREG5: Output of 5.5V linear regulator. Bypass to GND with a high-quality ceramic capacitor of at least
1.0 µF. VREG5 is active when ENx is high.""

REF2. Funtional Block Diagram (page 6)

5VREG use VIN1 Input only. No control fro ENx pins.

I use power good PG1 (from first converter) with pull-up connected with 5VREG for control EN2 pin (second converter).

And I not sure that this will work, because according REF1 VREG5 active with BOTH ENx enabled.

So datasheet provide or wrong description or wrong diagram.

How use power good from 1-st converter for control second if LDO active when BOTH enabled?

Use external supply for PG1 pull-up? But what is purpose of VREG5 in this situation?

over 12 years ago

0 JohnTucker over 12 years ago

TI__Guru**** 191445 points

If you read the note under that table, you will see that the ENx referes to either EN1 or EN2. So VREG5 will regulate when VIN1 is above 4.5 V and either EN1 or EN2 is high. So you can use PWRGD1 to sequence the second supply.

0 Victor Levandovsky over 12 years ago in reply to JohnTucker

Intellectual 575 points

Thank you.

But Block Diagram is NOT correct. True?

Regards,

Victor

0 JohnTucker over 12 years ago in reply to Victor Levandovsky

TI__Guru**** 191445 points

I do not think there is actually an error in the diagram. It just does not go to that level of detail. There is a LOT of circuitry in the device that is not shown or referenced.

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TPS54494 LDO Output