Dear Forum,
I have designed and built a 5.0V in to 1.0V out DC-DC converter using the TI TPS40400. I am using the TI CSD86330Q3D to provide both the high and low switching FETs. I observe that, during the dead time whilst both FETs are switched off (approximately 40ns), the SW switching node falls to -800mV with a brief initial pulse of -1280mV for 5ns. This is as I would expect, due to the dead time current having to flow through the source-drain diode in the low side FET. As stated in the datasheet, the absolute maximum rating on the SW pin extends down to -5V, so this is fine.
However, I also observe that the HDRV pin (the gate driver for the high side FET) follows the SW pin down to -800mV for the 40ns dead time including the -1280mV pulse for 5ns. The datasheet states that the absolute maximum rating for this pin only extends down to -300mV. Is the observed behaviour acceptable, or might this damage the TPS40400 device?
Thanks for your help.
Gavin Jones.
