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LMR62421 - Layout guidelines for WSON (NGG) package

D. Johnson
Intellectual 700 points
Other Parts Discussed in Thread: LMR62421, LM2832

Do you have an example of a thermal layout for this device/package ? 

Figure 24 in the datasheet shows a possible technique, but does not elaborate.  It would be nice to know the best locations for additional thermal vias along with proper solder mask definitions.  The EVM is not a good guide.

Please advise.

Thanks

Dave Johnson

  • 0
    TI__Expert 3840 points

    Hi Dave,

    Let me look for a reference design that meets your needs.  But as a rule of thumb place as many thermal vias as will fit underneath the exposed pad to form an array, with 1mm  spacing. Connect the vias to as many layers of copper as possible to spread the heat away from the package and to the PCB surface where it can transfer to the ambient air. In the case of the LMR62421 the exposed pad is electrically connected to ground and thus, the top ground layer and the bottom ground layer are usually the most convenient copper planes for heat transfer. The thermal resistance is significantly lowered by having as solid a bottom layer ground as possible, so avoid any cuts on that layer.  The solder mask definition just needs to be around the DAP so that you can get the whole DAP connected to the top GND copper layer. 


    Best Regards,

    -Juan

  • 0 in reply to Juan Paulo Fung
    TI__Genius 14317 points

    From the LM2832 Data Sheet (attached) with regard to WSON - 6 package power pad:

    The PCB size, weight of copper used to route traces and ground plane, and number of layers within the PCB can greatly effect Rthermal.The type and number of thermal vias can also make a large difference in the thermal impedance. Thermal vias are necessary in most applications. They conduct heat from the surface of the PCB to the ground plane. Four to six thermal vias should be placed under the exposed pad to the ground plane if the WSON package is used.

    More info about this is in the Data Sheet as well.

    lm2832.pdf
  • 0 in reply to D. Johnson
    Intellectual 700 points

    The goal is to make sure we realize sufficient thermal performance to meet the 80C/W Theta Ja stated in the datasheet.  Knowing the layout DETAILS required to realize the best thermal performance.

    Can TI do a thermal review of a design ?

    Vin 3.3 (+/- 5%), Vout 16.5V, Iout Max 150mA.  Ambient temperature could get as high as 110C.  This would be the worst case scenario.

    Thanks,

    Dave

  • 0 in reply to D. Johnson
    TI__Expert 3840 points

    Hi Dave,

    Do you have a preliminary board layout, max board size (or size for the application), layer stack up and thicknesses? Our team will review your inputs and test conditions and will  make a recommendation.  You mention Ta = 110C, any cooling or airflow available?

    Thanks,

    -Juan

  • 0 in reply to Juan Paulo Fung
    Prodigy 70 points

    Hi Juan,

    The board is an oblong shape with approximate rectangular dimensions of 3.2" x 4.6". Stackup is 8-layer, 2oz Cu. We are currently at 0.062" thickness, but may move to 0.093". If you need any further information to provide us a recommendation for minimum ground plane dimensions to tie the thermal pad to in order to obtain a junction temperature rise of no more than 10C as compared to ambient let me know.

    Thanks,

    Jeff

  • 0 in reply to Jeff Tooley
    Prodigy 70 points

    I should also mention that air flow is not assumed to be available, and the Iout,max from the LMR62421 is 94.2mA (assume 100mA for calculations).