bq76PL536a Sleep mode exit

To exit from sleep mode, the following sequence should be executed:

1. The host controller asserts CS_H on the bottom IC to wake it up.
2. Broadcast write to the IO_CONTROL register to clear the SLEEP bit.
3. Wait for min 1ms.
4. The device will exit SLEEP mode and CS_N will now be activated.
5. Repeat steps 2 to 4 until all devices are awake.

Thanks, Stephen, but that does not seem to be working for me.  The host SPI CS is asserted by the SPI interface routine.  As an interesting(!) side effect, once commanded into sleep, because of my error a device won't even respond to BQ76PL536_RESET, so there's the possibility of bricking battery packs.  Here's my code:

bool bq_pack_Sleep_Exit(void) {
    uint8_t Device;
    bool Success = false;
    for (Device = 1; Device < NUMBER_OF_BQ_DEVICES + 1; Device++) {
        spi_write_reg(Device, IO_CONTROL_REG, 0b00000011); // TS1&2 power on, Sleep off

        // According to Battery Management - Gas Gauge Forum note, need to wait at least 1ms between subsequent wakes
        while (false == SecondsFlag); // wait here 250ms, 63ms not enough? Try one second
        SecondsFlag = false;

        spi_read_reg(Device, IO_CONTROL_REG, 1, DISCARD_CRC, &SPI_Data[0]); // Read-back IO Control
        printf("Sleep exit, Device %d IO Control read-back 0x%.2X  ", Device, SPI_Data[FIRST_VALID_BYTE_INDEX]);

        spi_read_reg(Device, ADC_CONTROL_REG, 1, DISCARD_CRC, &SPI_Data[0]); // Read back ADC Control
        printf("ADC Control 0x%.2X  ", SPI_Data[FIRST_VALID_BYTE_INDEX]);

        spi_read_reg(Device, ALERT_STATUS_REG, 1, DISCARD_CRC, &SPI_Data[0]); // Check Alert Status
        printf("Alert Status 0x%.2X  ", SPI_Data[FIRST_VALID_BYTE_INDEX]);

        // Acquire alert and fault status and clear if any have occurred
        Clear_Fault[Device] = clear_faults(Device + 1, &Device_Status[Device], &Fault_Status[Device],
                &CUV_Fault[Device], &COV_Fault[Device], &Alert_Status[Device]);

        printf("Status: 0x%.2X  Fault: 0x%.2X  Alert: 0x%.2X\r\n",
                Device_Status[Device], Fault_Status[Device], Alert_Status[Device]);
    }
    return Success;
}

The above queries to the Sleeping device return zeros.  I can see that the device is actually in sleep by the bench supply current.

Can you see what I'm doing wrong?  Thanks!

One other intriguing thing -- when Device 2 is commanded into Sleep mode, and before the next lower device is commanded, the IO Control register can no longer be read back after about 50ms (more than 25ms but less than 1 second).  This in spite of the datasheet note that says in Sleep mode, " SPI communications are preserved; all registers may be read or written."  Device 1 in Sleep mode does allow continued queries of the IO Control register.

I'm not sure what you are doing wrong, but I can read the IO_CONTROL register in each device in a 3 IC stack 100ms after they have been put to sleep. I can verify the ICs are still in sleep mode by the current consumption.

Is there a way we can dialog more directly, so I can send you schematics and so on?

I've refined my tests and found I can no longer read IO_Control on Device 2 after 500ms +/-50.  But it seems key to me that communication is lost on Device 2 after that point, so that it cannot respond to clearing the Sleep bit.

So are you saying that even with the entire 3-device stack in sleep mode, your test on the Evaluation Module shows you can always access all devices in the stack?  Able to read Device 3 when lower two devices are in sleep mode?  My problem is that I can't read Device 2 in Sleep even with Device 1 awake.

My BMS is arranged with two devices per board, and intended to chain additional BMS units above.  I believe I've matched the Evaluation Module schematic for the interconnection and termination.

You can add me as a friend, then we can privately message each other.

Yes, I can confirm that I have a 3 device stack (the EVM board) with each device placed in SLEEP mode, each with a different configuration in the IO_CONTROL register: ID 1 has 0x04 (SLEEP mode only), ID 2 has 0x05 (SLEEP mode with TS0 enabled) and ID 3 has 0x06 (SLEEP mode with TS1 enabled). Without removing any devices from SLEEP mode, I then read back the IO_CONTROL register of ID 1, wait 100ms, read IO_CONTROL of ID 2, wait 100ms then read IO_CONTROL of ID 3. I get the expected values of 0x04, 0x05 and 0x06 (respectively).

Can you confirm that device 2 is responding before it goes into SLEEP mode?

Thanks for updating the thread for others to see...